Semiconductor Chip Bonding Apparatus Two-Step Alignment
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Solution Overview
Problem
The challenge is to improve the mounting accuracy and quality of semiconductor chips on wiring substrates as the space for mounting becomes smaller and more miniaturized, requiring a technology that can accurately and efficiently bond semiconductor chips to these substrates.
Innovation Solution
A semiconductor chip bonding apparatus that uses a method involving temporary bonding followed by subsequent strong bonding, utilizing a temporary bonding portion for initial alignment and bonding, and a main compression portion for enhanced bonding, allowing for simultaneous processing of multiple chips on a substrate, thereby improving mounting efficiency and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single bonding step is used to mount semiconductor chips, then the process is simple and fast, but the mounting accuracy and quality deteriorate
Solution Approach 1:
The bonding process is segmented into two distinct steps: a first bonding step that temporarily bonds semiconductor chips to the substrate, and a second bonding step that strongly bonds the chips. This segmentation allows each step to be optimized for its specific function, improving overall mounting accuracy without requiring excessive complexity in a single step.
Solution Approach 2:
The first bonding step serves as a preliminary action that temporarily secures the semiconductor chips to the substrate in correct positions. This preliminary bonding allows for subsequent alignment and processing before the final strong bonding, ensuring high mounting accuracy while maintaining process efficiency.
2Manufacturing precision
If multiple bonding steps are implemented to improve mounting quality, then the mounting accuracy improves, but the processing time increases
Solution Approach 1:
The first and second bonding steps are performed continuously without interrupting the substrate. While the first bonding step temporarily secures chips in one region, the substrate is immediately transferred to perform the second bonding step in another region. This continuous processing minimizes idle time and maintains high productivity despite the two-step bonding process.
Solution Approach 2:
The system dynamically adjusts the bonding process by performing different bonding operations on different regions of the substrate at different times. The apparatus can switch between first bonding and second bonding modes, and between processing different chip regions, optimizing the overall processing time while ensuring high mounting quality.
3Productivity
If simultaneous bonding of multiple chips is performed, then productivity increases, but alignment precision may deteriorate
Solution Approach 1:
The substrate is divided into multiple regions, with different bonding steps performed on different regions. This spatial segmentation allows multiple chips to be bonded simultaneously in different regions without interfering with each other's alignment, maintaining high precision while improving productivity.
Solution Approach 2:
The first bonding step performs preliminary positioning of multiple semiconductor chips across different regions of the substrate simultaneously. This preliminary action establishes correct positions for all chips before the second bonding step, ensuring alignment precision is maintained even when processing multiple chips in parallel.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the mounting accuracy and quality of semiconductor chips by preventing misalignment during the bonding process, allowing for higher productivity without increasing manufacturing costs or apparatus size, and effectively bonding chips using thermoplastic or thermosetting adhesives.
Implementation Method 1
effectively bonding chips using thermoplastic or thermosetting adhesives
Data Source
AI summary
A method of manufacturing a semiconductor device includes: providing a first substrate that includes internal wiring, the first substrate including an array of chip mounting regions that includes a first chip mounting region; placing the first substrate on a first carrier line; providing a first semiconductor chip; placing the first semiconductor chip on a first moveable tray; vertically aligning the first chip mounting region of the first substrate with the first semiconductor chip, and performing initial bonding of the first semiconductor chip to the first chip mounting region of the first substrate; and performing subsequent bonding on the initially-bonded first semiconductor chip and first mounting region of the first substrate, thereby more strongly bonding the first semiconductor chip to the first substrate at the first mounting region. The initial bonding occurs after performing a subsequent bonding of at least one other semiconductor chip on the first substrate.


