Double-Sided Semiconductor Chip Bonding to Prevent Wire-Bond Cracking
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Solution Overview
Problem
The challenge is to prevent cracking or chipping of semiconductor chips during wire-bonding, especially when the opposite surface cannot be fixed, which hinders the mass productivity of semiconductor devices with double gate structures.
Innovation Solution
A semiconductor device design where the second principal electrode and second control electrode pad are bonded to separated metal patterns on an insulating substrate, with the bonding sections of the wires overlapping the electrode pads to secure the opposite surface, and the metal patterns having a thickness of 0.2 mm or less for improved accuracy and bonding area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire-bonding is performed on control electrode pads on both surfaces, then electrical connection is improved, but cracking or chipping of semiconductor chip occurs due to ultrasound wave impact
Solution Approach 1:
The opposite surface of the semiconductor chip is fixed to the support substrate before wire-bonding is performed on the control electrode pads. This preliminary fixation prevents the chip from moving or vibrating during the ultrasound wave impact, thereby preventing cracking or chipping while still allowing wire-bonding to be performed on both surfaces
Solution Approach 2:
A support substrate is introduced as an intermediary element to which the opposite surface of the semiconductor chip is fixed. This support substrate acts as a mediator that stabilizes the chip during wire-bonding operations, preventing damage from ultrasound waves while enabling reliable electrical connection through wire-bonding on both surfaces
2Adaptability or versatility
If wire-bonding is performed on both surfaces, then device functionality is improved, but manufacturing complexity increases due to difficulty in fixing opposite surface
Solution Approach 1:
The opposite surface of the semiconductor chip is preliminarily fixed to the support substrate before wire-bonding operations. This preliminary action simplifies the overall manufacturing process by providing a stable platform for subsequent wire-bonding, making the process suitable for mass production while maintaining device functionality
Solution Approach 2:
The support substrate serves as an intermediary that facilitates the wire-bonding process on both surfaces. By providing a stable mounting surface, it simplifies manufacturing operations and enables mass production while achieving the desired device functionality with control electrode pads connected on both surfaces
3Manufacturing precision
If metal pattern thickness is reduced to 0.2 mm or less, then pattern accuracy is improved, but mechanical strength decreases
Solution Approach 1:
The thickness of the metal patterns is optimized to 0.2 mm or less to achieve high pattern accuracy for matching electrode shapes. This parameter change improves manufacturing precision while the sufficient bonding area compensates for the reduced thickness, maintaining adequate mechanical strength for the application
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the yield and ease of manufacturing for semiconductor devices by preventing breakage during bonding, improving pattern accuracy, increasing mechanical strength, and reducing thermal resistance.
Implementation Method 1
the second principal electrode and the second control electrode pad are respectively bonded to the first and second metal patterns
Implementation Method 2
wire-bonding is performed on the control electrode pads on both of the surfaces
Data Source
AI summary
A first principal electrode and a first control electrode pad are formed on a first principal surface of the semiconductor chip. A second principal electrode and a second control electrode pad are formed on a second principal surface of the semiconductor chip. The second principal electrode and the second control electrode pad are respectively bonded to first and second metal patterns of an insulating substrate. Bonding sections of first and second wires overlap a bonding section of the second principal electrode or the second control electrode pad in plan view. Thickness of the first and second metal patterns is 0.2 mm or less.