Semiconductor Chip Thermal Management via Segmented Bonding
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Solution Overview
Problem
The reliability of semiconductor devices with multiple chips arranged side by side in a packaged structure is a concern due to stress and heat management issues, which affect the performance and longevity of the device.
Innovation Solution
A semiconductor device design featuring semiconductor chips CP1 and CP2 mounted on a die pad with conductive bonds and wires, where the chips are arranged side by side, with the power MOSFET chip CP1 having a conductive bond for heat dissipation and the microcomputer chip CP2 having an insulating bond for reduced heat conductivity, and wires of varying thickness and material for efficient electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple semiconductor chips are arranged side by side in a packaged structure, then the functionality and integration are improved, but stress and heat management issues worsen
Solution Approach 1:
The patent divides the die pad into multiple independent die pads, each supporting a separate semiconductor chip. This segmentation allows each chip to be independently mounted and managed, reducing the stress concentration that would occur if multiple chips were mounted on a single shared die pad. The segmentation principle directly addresses the reliability issue by creating isolated stress zones.
Solution Approach 2:
The patent applies different material properties to different regions of the package structure. Specifically, insulating materials are used in certain areas to manage heat distribution, and different die pad materials are selected based on local thermal and electrical requirements. This local quality approach optimizes heat management and stress distribution across the packaged structure.
2Reliability
If semiconductor chips are mounted on a die pad with conductive bonds, then electrical connectivity is improved, but heat dissipation becomes problematic
Solution Approach 1:
The patent uses conductive bonds for electrical connection while simultaneously using insulating materials in specific regions to manage heat flow. This local differentiation allows the system to achieve both good electrical connectivity where needed and effective heat dissipation where required, resolving the contradiction between these two functions.
Solution Approach 2:
The die pad structure acts as an intermediary between the semiconductor chips and the heat dissipation system. By using insulating materials strategically placed in the die pad structure, the patent creates a thermal management interface that allows heat to be effectively dissipated while maintaining electrical connectivity through the conductive bonds.
3Temperature
If high heat conductivity bonds are used for power MOSFET chip, then heat dissipation is improved, but electrical noise interference increases
Solution Approach 1:
The patent applies different bond types to different chips based on their specific requirements. The power MOSFET chip uses bonds optimized for heat dissipation, while the microcomputer chip uses insulating bonds to prevent noise. This local quality differentiation resolves the contradiction by allowing each chip to have its optimal bond type without interfering with other chips.
Solution Approach 2:
The patent segments the bonding strategy by chip type, using conductive bonds for power devices that require heat dissipation and insulating bonds for sensitive digital devices that require noise protection. This segmentation of bonding approaches allows each chip to operate in its optimal thermal and electrical environment.
4Reliability
If insulating bonds are used for microcomputer chip, then electrical noise is reduced, but heat dissipation capability decreases
Solution Approach 1:
The patent segments the thermal management approach by separating the heat dissipation paths for different chip types. The microcomputer chip's heat is managed through its own dedicated path using insulating bonds that prevent noise while still allowing heat to be conducted away, while power chips use separate conductive bonding paths. This segmentation allows each chip type to have optimized bonding without compromising the other.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability and performance of the semiconductor device by improving heat dissipation and electrical connectivity, reducing stress on the components and enhancing the overall package reliability.
Implementation Method 1
the power MOSFET chip CP1 having a conductive bond for heat dissipation
Implementation Method 2
the microcomputer chip CP2 having an insulating bond for reduced heat conductivity
Data Source
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AI summary
A semiconductor device includes first and second semiconductor chips, a plurality of leads, a plurality of wires, and a sealing body sealing those components. A first pad electrode, a second pad electrode, and an internal wiring electrically connected to the first and second electrode pads are formed on a main surface of the first semiconductor chip. A third pad electrode of the second semiconductor chip is electrically connected to the first electrode pad of the first semiconductor chip via a first wire, and the second electrode pad of the first semiconductor chip is electrically connected to a first lead via a second wire. A distance between the first lead and the first semiconductor chip is smaller than a distance between the first lead and the second semiconductor chip. The first electrode pad, the second electrode pad and the internal wiring are not connected to any circuit formed in the first semiconductor chip.