Semiconductor Chip Bump Geometry for Heat Dissipation

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Solution Overview

Problem

The flip chip technology for mounting semiconductor chips in power amplifier circuits fails to adequately dissipate heat generated by transistors, affecting their characteristics, while also not minimizing the mounting area effectively.

Innovation Solution

A semiconductor chip design featuring transistors with bumps of varying shapes and sizes on a semiconductor substrate, where the bumps connected to the transistors' collectors and emitters have larger areas than those connected to the collectors, facilitating heat dissipation while maintaining a reduced mounting area, by using circular, rectangular, or oval bumps strategically positioned for efficient heat radiation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If flip chip technology is used to mount semiconductor chips, then mounting area is reduced, but heat dissipation becomes inadequate

Engineering Contradiction:
Improvemounting areaVSAvoidheat dissipation
Core Design Contradiction:
Area of stationary objectVSTemperature

Solution Approach 1:

The patent applies different bump shapes and sizes at different locations on the chip. Specifically, bumps connected to transistor collectors are made larger (rectangular or oval) compared to bumps connected to transistor emitters (circular), creating local variations in heat dissipation capacity where it is most needed.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces asymmetry in the bump structures by using different geometries (circular vs. rectangular/oval) and different sizes for bumps at different transistor terminals. This asymmetric design allows optimized heat dissipation from collector regions which generate more heat, while maintaining compact overall chip area.

Inventive Principle:
Principle #4Asymmetry

2Temperature

If larger bumps are used to improve heat dissipation, then mounting area increases

Engineering Contradiction:
Improveheat dissipationVSAvoidmounting area
Core Design Contradiction:
TemperatureVSArea of stationary object

Solution Approach 1:

Instead of uniformly increasing all bump sizes, the patent applies larger bump sizes only where needed (collector connections) while keeping emitter connection bumps smaller (circular), thus achieving localized heat dissipation improvement without proportionally increasing overall mounting area.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively reduces the influence of heat on transistor characteristics and minimizes the mounting area by increasing the heat radiation through larger bumps, improving heat dissipation and maintaining reliable chip mounting.

Implementation Method 1

the area of each of the second, the third, and the fourth bumps is larger than the area of the first bump... effectively reduces the influence of heat on transistor characteristics and minimizes the mounting area by increasing the heat radiation through larger bumps

Methodology Applied
Scientific EffectHeat dissipation: Thermal Radiation

Data Source

PatentUS11676825B2Semiconductor chip
Publication Date: 2023.06.13 MURATA MFG CO LTD
  • US11676825B2 patent drawing
  • US11676825B2 patent drawing
  • US11676825B2 patent drawing

AI summary

A semiconductor chip has a first transistor that amplifies a first signal and outputs a second signal, a second transistor that amplifies the second signal and outputs a third signal, and a semiconductor substrate having a main surface parallel to a plane defined by first and second directions and which has the first and second transistors formed thereon. The main surface has thereon a first bump connected to a collector or drain of the first transistor, a second bump connected to an emitter or source of the first transistor, a third bump connected to a collector or drain of the second transistor, and a fourth bump connected to an emitter or source of the second transistor. The first bump is circular, the second through fourth bumps are rectangular or oval, and the area of each of the second through fourth bumps is larger than that of the first bump.