Semiconductor Chip Bus System Reducing Line Count
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Solution Overview
Problem
Conventional semiconductor chip arrangements require a large number of lines and connections for transmitting load control data, which is inefficient and can lead to increased complexity and electromagnetic interference.
Innovation Solution
A modified microsecond bus system where the microcontroller transmits pilot data to set the transmission rate for diagnostic data, eliminating the need for a separate transmission clock signal and reducing the number of lines required between semiconductor chips, and using time-division multiplexing to prioritize data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If each load connected to the power chip has a dedicated pulse-width modulated signal transmitted on a dedicated line, then the load control data transmission is reliable and simple to implement, but the microcontroller and power chip require a very large number of lines and input/output connections
Solution Approach 1:
The patent combines multiple dedicated load control signal lines into a single serial transmission channel. Instead of transmitting each pulse-width modulated signal separately on its own line, the microcontroller samples the signals at regular intervals and transmits the sampled data serially through one shared communication interface to the power chip, which then reconstructs the original signals.
Solution Approach 2:
The patent transitions from spatial parallel transmission (multiple simultaneous lines) to temporal serial transmission (single line with time-multiplexed signals). By sampling loads at regular time intervals and transmitting the sampled values sequentially over time through a single channel, the system achieves the same control functionality with dramatically reduced physical connections.
2Reliability
If a transmission clock signal is transmitted separately to synchronize diagnostic data transmission, then data synchronization is accurate and reliable, but the number of lines and connections between microcontroller and power chip increases
Solution Approach 1:
The patent makes the single serial communication channel multi-functional by using it for both load control data transmission and diagnostic data reception. The same physical interface handles bidirectional communication between the microcontroller and power chip, eliminating the need for separate dedicated clock and data lines.
Solution Approach 2:
The power chip autonomously generates its own transmission clock signal based on pilot data received from the microcontroller. Instead of requiring an external clock signal from the microcontroller, the power chip self-generates the timing reference needed for synchronized diagnostic data transmission, reducing the number of required connections.
3Reliability
If multiple data types (load control data, pilot data, diagnostic data) are transmitted through separate channels, then data transmission is simple and reliable, but the number of lines and connections between chips increases significantly
Solution Approach 1:
The patent merges transmission of multiple data types (load control data, pilot data, and diagnostic data) through a single serial communication channel. Different data types are transmitted sequentially or in multiplexed fashion through the same physical interface, eliminating the need for separate dedicated lines for each data type.
Solution Approach 2:
The patent employs periodic sampling of load signals at regular time intervals and transmits the sampled values in a structured sequence. This periodic transmission pattern allows the single channel to systematically handle multiple data types by allocating specific time slots for different data categories, ensuring reliable transmission without requiring separate channels.
Data Source
AI summary
An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The first semiconductor chip transmits appropriate pilot data in order to prescribe to the second semiconductor chip what transmission rate is to be used by the second semiconductor chip to transmit the diagnostic data to the first semiconductor chip.