Semiconductor Chip Cavity for Adiabatic Optical Flex Coupling

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Solution Overview

Problem

Existing adiabatic or evanescent coupling methods for silicon photonics optical inputs/outputs face challenges in reliable high-volume production, particularly due to issues with back-end-of-line (BEOL) routing, seal ring discontinuation, and difficulty in controlling optical flex bends, leading to incomplete electrical isolation and compromised electrostatic discharge protection.

Innovation Solution

A semiconductor chip design featuring a cavity etched into the chip with a seal ring extending around it, allowing for an optical flex to be attached at the bottom surface with a controlled bending radius, facilitating adiabatic coupling while maintaining complete seal ring functionality and electrical isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If adiabatic coupling is implemented using conventional gluing methods, then optical coupling efficiency is improved, but manufacturing reliability and production consistency deteriorate

Engineering Contradiction:
Improvemanufacturing reliabilityVSAvoidproduction consistency
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent implements preliminary action by pre-defining the cavity geometry and seal ring structure during chip fabrication before the coupling process. The cavity is etched with precise dimensions and the seal ring is formed as an integrated feature, ensuring consistent positioning and spacing for optical coupling without requiring complex post-fabrication adjustments during production

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies parameter changes by optimizing the cavity depth, radius, and seal ring dimensions to achieve the desired optical coupling characteristics. By carefully controlling these geometric parameters, the design achieves effective adiabatic coupling while maintaining manufacturing simplicity and production consistency across high-volume manufacturing

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the optical flex is bent to achieve coupling, then adiabatic coupling effectiveness is improved, but control precision and positioning accuracy deteriorate

Engineering Contradiction:
Improvecoupling effectivenessVSAvoidbending control precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent utilizes curvature by designing the optical flex with a controlled bending radius as it passes through the cavity. The curved path of the optical flex within the cavity enables effective adiabatic coupling between the chip waveguide and the external optical medium, while the standardized curvature geometry simplifies manufacturing control compared to arbitrary bending configurations

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent applies the nesting principle by routing the optical flex through the cavity structure, where the flex is contained within the defined cavity boundaries. This nested configuration provides mechanical support and precise positioning, enabling controlled bending without requiring external positioning mechanisms

Inventive Principle:
Principle #7Nested doll (Nesting)

3Object-affected harmful factors

If the seal ring is extended around the cavity, then electrostatic discharge protection is improved, but device complexity increases

Engineering Contradiction:
Improveelectrostatic discharge protectionVSAvoidseal ring structure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the seal ring function with the cavity structure by forming the seal ring as an integrated feature surrounding the cavity. This combined structure provides both the optical coupling interface and electrostatic discharge protection through a single geometric feature, eliminating the need for separate protection elements and reducing overall device complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The seal ring structure serves multiple functions: it defines the cavity boundary for optical coupling, provides mechanical support for the optical flex, and offers electrostatic discharge protection. This multi-functional design achieves comprehensive protection without proportionally increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables reliable and efficient adiabatic coupling with controlled bending of the optical flex, ensuring effective electrostatic discharge protection and complete electrical isolation, thus addressing the limitations of existing methods in high-volume production.

Implementation Method 1

The term adiabatic coupling refers to the fact that transition occurs substantially without loss of energy. The working principle of such a coupling is based on asymmetric directional couplers (DC), wherein each waveguide changes its cross section and/or refractive index along a direction of propagation.

Methodology Applied
Scientific EffectAdiabatic coupling:

Implementation Method 2

Adiabatic or 'evanescent' coupling may involve one or more optical layers realized in, e.g., an optical integrated circuit (OIC) and one or more optical layers realized, e.g., in a medium/support/interposer, external to the OIC.

Methodology Applied
Scientific EffectEvanescent coupling:

Data Source

PatentUS10422968B2Optical semiconductor chip, corresponding arrangement, apparatus and method
Publication Date: 2019.09.24 STMICROELECTRONICS SRL
  • US10422968B2 patent drawing

AI summary

A semiconductor chip provides an optical medium for light propagation. The semiconductor chip includes a chip surface with an outer perimeter and a cavity in the chip surface. The cavity includes a peripheral wall and a bottom surface surrounded by the peripheral wall, the bottom surface adiabatically couplable to an optical waveguide. The cavity is located at an area of the chip surface spaced from the outer perimeter thereof.