Semiconductor Chip Conductive Layer ESD Shielding

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Solution Overview

Problem

In the production of semiconductor devices, electrostatic discharges (ESD) and electromagnetic radiation can damage or destroy semiconductor chips, and existing methods do not adequately protect against these issues.

Innovation Solution

A workpiece comprising semiconductor chips with an electrically conducting layer on their second main surface and side faces, embedded in a molding compound, which provides electrical conductivity and shielding, allowing for effective discharge of electrostatic charges and protection from electromagnetic interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wafer molding process is used to embed semiconductor chips in plastic molding compound, then chips are protected and coplanar surface is formed, but electrostatic discharges can occur causing damage to chips

Engineering Contradiction:
Improvechip protectionVSAvoidelectrostatic discharge damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

An electrically conducting layer is applied to the second main surface and side faces of the semiconductor chips before embedding them in the molding compound. This preliminary protective layer dissipates electrostatic charges that would otherwise damage the chips during handling and processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The electrically conducting layer converts the potentially harmful electrostatic discharge into a beneficial protective mechanism by providing a controlled path for charge dissipation, preventing uncontrolled ESD events that could damage the semiconductor chips.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Reliability

If wafer molding process is used to create composite panel, then chips are secured in positions, but semiconductor chips are exposed to electromagnetic radiation

Engineering Contradiction:
Improvechip positioningVSAvoidelectromagnetic radiation interference
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

An electrically conducting layer is applied to the second main surface and side faces of the semiconductor chips before embedding them in the molding compound. This preliminary protective layer dissipates electrostatic charges that would otherwise damage the chips during handling and processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The electrically conducting layer converts the potentially harmful electrostatic discharge into a beneficial protective mechanism by providing a controlled path for charge dissipation, preventing uncontrolled ESD events that could damage the semiconductor chips.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Strength

If plastic molding compound is used to embed chips, then mechanical protection is provided, but electrical conductivity and ESD protection are insufficient

Engineering Contradiction:
Improvemechanical protectionVSAvoidESD protection
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The invention combines the mechanical protection of the plastic molding compound with the electrical conductivity of a metal layer (such as aluminum, copper, or conductive polymer) applied to the chip surfaces. This composite structure provides both mechanical strength and electrical ESD protection simultaneously.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The electrically conducting layer is merged with the molding compound during the molding process, creating an integrated structure where the conductive layer is embedded within or on the surface of the plastic compound, combining mechanical and electrical protective functions in a single component.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution prevents damage from ESD and electromagnetic radiation by enabling efficient dissipation of electrostatic charges and shielding of semiconductor chips, reducing the need for specialized handling environments and simplifying the production process.

Implementation Method 1

an electrically conducting layer arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface

Methodology Applied
Scientific EffectElectrical conductivity: Conduction (electrical)

Implementation Method 2

an electrically conducting layer arranged on the at least two semiconductor chips... providing electrical conductivity and shielding, allowing for effective discharge of electrostatic charges and protection from electromagnetic interference

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentUS9601475B2Workpiece with semiconductor chips, semiconductor device and method for producing a workpiece with semiconductor chips
Publication Date: 2017.03.21 TAHOE RES LTD
  • US9601475B2 patent drawing
  • US9601475B2 patent drawing
  • US9601475B2 patent drawing

AI summary

A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer.