Ultra-thin Semiconductor Chip via Dummy Sidewall Thinning
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Solution Overview
Problem
The semiconductor industry faces challenges in thinning down IC chips to an ultra-thin level, limiting their application in flexible and wearable electronic devices due to conventional manufacturing limitations, which restricts their use in technologies like rollable displays and foldable mobile devices.
Innovation Solution
A method involving the use of a sacrificial silicon wafer as sidewalls with an underfill material to thin down the semiconductor chip, allowing for a reduced thickness of less than 50 μm, enabling the chip to be applied in flexible and wearable devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional semiconductor manufacturing processes are used, then the IC chip can be produced with standard thickness, but the chip thickness cannot be reduced below 100 μm due to manufacturing limitations
Solution Approach 1:
The manufacturing process is segmented into multiple stages: first forming a thicker chip structure with standard processes, then using a dummy wafer as a support during selective thinning operations. This allows the chip to be thinned in controlled segments rather than attempting to manufacture it thin from the start, resolving the contradiction between desired thinness and manufacturing capability.
Solution Approach 2:
A dummy wafer is introduced as an intermediary support structure during the thinning process. The dummy wafer provides mechanical support to the chip during grinding and thinning operations, enabling the chip to be reduced below 100 μm thickness without compromising structural integrity or manufacturing feasibility. The dummy wafer is later removed, leaving the ultra-thin chip.
2Adaptability or versatility
If the IC chip thickness is reduced to ultra-thin levels, then applications in flexible and wearable devices become possible, but conventional manufacturing processes cannot achieve such thinness
Solution Approach 1:
The chip is first manufactured with standard thickness using conventional processes, then a dummy wafer is attached to the back surface before thinning operations. This preliminary preparation enables subsequent ultra-thin processing by providing the necessary support structure, allowing the chip to achieve ultra-thin dimensions suitable for flexible and wearable applications while remaining manufacturable.
Solution Approach 2:
The chip thickness parameter is changed from standard (>100 μm) to ultra-thin (<50 μm) through a controlled process involving dummy wafer attachment, selective grinding, and dummy wafer removal. This parameter transformation enables expansion into new application fields while using adapted conventional manufacturing techniques.
3Length of moving object
If the chip is thinned down significantly, then the size and thickness meet the needs for minimal sized IC chips, but the manufacturing process becomes more complex
Solution Approach 1:
The dummy wafer is extracted from the final chip structure after serving its purpose as a support during thinning. By removing the dummy wafer after the thinning process, the manufacturing process achieves ultra-thin chip dimensions without permanently adding complex structures to the final product, thereby reducing overall manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the production of ultra-thin semiconductor chips, enhancing their applicability in emerging technologies by reducing size and thickness, thereby expanding their use beyond conventional fields.
Implementation Method 1
employing a sacrificial (or dummy) wafer as sidewalls. The dummy wafer may be a silicon wafer, and is used as dummy sidewalls while an underfill material is filled into a space between semiconductor chip and the dummy wafer
Implementation Method 2
The dummy wafer is then further ground together with the passive surface of the semiconductor chip (i.e., the surface where no active circuitry components are present) to be thinned down to a preferred thickness
Data Source
AI summary
The present disclosure provides devices and methods in which a semiconductor chip has a reduced size and thickness. The device is manufactured by utilizing a sacrificial or dummy silicon wafer. A recess is formed in the dummy silicon wafer where the semiconductor chip is mounted in the recess. The space between the dummy silicon wafer and the chip is filled with underfill material. The dummy silicon wafer and the backside of the chip are etched using any suitable etching process until the dummy silicon wafer is removed, and the thickness of the chip is reduced. With this process, the overall thickness of the semiconductor chip can be thinned down to less than 50 μm in some embodiments. The ultra-thin semiconductor chip can be incorporated in manufacturing flexible/rollable display panels, foldable mobile devices, wearable displays, or any other electrical or electronic devices.