Semiconductor Chip Etching to Remove Crushed Layers
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Solution Overview
Problem
The reduction in thickness of semiconductor chips leads to a decrease in their bending strength and shock resistance due to the formation of crushed layers during processing, which can cause damage under external forces.
Innovation Solution
A method of manufacturing semiconductor devices that involves fixing the semiconductor wafer to a supporting member, grinding the rear surface, dividing the wafer into chip regions, etching the side surfaces to remove the crushed layer, and peeling off the chip regions to prevent strength reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the thickness of semiconductor chip is reduced to advance functions and reduce device size, then the thickness and device size are reduced, but the bending strength and shock resistance strength are reduced
Solution Approach 1:
The patent applies preliminary action by removing the crushed layer through etching before the chip is subjected to usage conditions. The etching step is performed on the rear surface of the semiconductor wafer before dicing, preventing the crushed layer from being present in the final chip structure. This preliminary removal of the harmful crushed layer ensures that even thin chips maintain their strength
Solution Approach 2:
The patent converts the harmful effect of the crushed layer into a beneficial process by using the presence of the crushed layer as an indicator for targeted etching. The etching process selectively removes the crushed layer while preserving the intact crystal structure of the bulk material. By controlling the etching depth and conditions, the harmful crushed layer is transformed into a controlled surface treatment that enhances chip strength
2Length of moving object
If the thickness of semiconductor chip is reduced, then the thickness is reduced, but the strength reduction due to crushed layer becomes more significant
Solution Approach 1:
The etching step is performed as a preliminary action before dicing and chip completion. By removing the crushed layer on the rear surface before the chip is finalized, the structural integrity is preserved throughout subsequent handling and usage. This timing ensures that no crushed layer remains to compromise reliability
Solution Approach 2:
The patent changes the physical-chemical parameters of the chip surface by applying etching treatment. The etching process modifies the surface morphology and removes the damaged crushed layer, transforming the surface from a high-stress, damaged state to a smooth, intact state. This parameter change in surface quality directly improves reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively prevents or suppresses the reduction in strength of semiconductor chips, even when they are made thin, by removing the crushed layers formed during processing, thereby enhancing their bending strength and shock resistance.
Implementation Method 1
grinding the rear surface of the semiconductor wafer
Implementation Method 2
etching a side surface of each of the plurality of divided chip regions so as to remove a crushed layer
Data Source
AI summary
A method includes the steps of: (a) fixing a front surface of a wafer (semiconductor wafer) having the front surface, a plurality of chip regions formed on the front surface, a dicing region formed between the chip regions, and a rear surface opposite to the front surface to the supporting member; (b) in a state of having the wafer fixed to the supporting member, grinding the rear surface of the wafer to expose the rear surface; (c) in a state of having the wafer fixed to the supporting member, dividing the wafer into the chip regions; (d) etching side surfaces of the chip regions to remove crushed layers formed in the step (c) on the side surfaces and obtain a plurality of semiconductor chips. After the steps (e) and (d), the plurality of divided chip regions are peeled off from the supporting member to obtain a plurality of semiconductor chips.