Semiconductor Chip Metallic Shaped Body Sintering Warpage Control

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Solution Overview

Problem

The existing methods for manufacturing semiconductor chips with metallic shaped bodies on the upper side face challenges such as warpage and mechanical stress during the sintering process due to thermal expansion differences between copper and silicon, leading to potential chip breakages and increased process complexity.

Innovation Solution

A method where metallic shaped bodies are temporarily immobilized on the semiconductor chip using a provisional adhesive connection, allowing safe handling and placement on a substrate after wafer separation, with the final sintering process occurring after chip placement, avoiding warpage and enabling simultaneous bonding of both chip sides.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metallic shaped bodies are sintered on the wafer before separation, then reliable electrical contact is achieved, but strong warpage and deformation occur due to thermal expansion differences

Engineering Contradiction:
Improveelectrical contact reliabilityVSAvoidwafer warpage
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The process is segmented into two distinct phases: first, temporary adhesive bonding of metallic shaped bodies to individual separated chips; second, final sintering after chip placement on substrate. This segmentation avoids warpage during wafer separation while achieving reliable electrical contact in the final step.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The metallic shaped bodies are temporarily positioned and bonded using adhesive before the final sintering process. This preliminary action allows safe handling and placement without the deformation risks of early sintering, while the final sintering ensures reliable electrical contact.

Inventive Principle:
Principle #10Preliminary action

2Strength

If sintering is performed at high temperature and pressure on the wafer, then strong bonding is achieved, but chip breakages occur due to mechanical stress

Engineering Contradiction:
Improvebonding strengthVSAvoidchip integrity
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The bonding process is divided into temporary adhesive bonding (low stress) followed by final sintering (high stress) after chip placement. This ensures chips are individually supported on substrates during the high-stress sintering step, preventing breakages while achieving strong bonding.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Chips are placed on substrates before the final sintering process, providing mechanical support and cushioning during the high-temperature and high-pressure bonding step. This prevents chip breakages that would occur if sintering were performed on free-standing thin wafers.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Loss of energy

If the wafer is made thinner to reduce electrical losses, then electrical performance improves, but handling and processing become more difficult

Engineering Contradiction:
Improveelectrical lossesVSAvoidwafer handling
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

Metallic shaped bodies are temporarily bonded to chips before separation and placement, providing mechanical reinforcement to thin wafers during handling. This preliminary action enables safe processing of ultra-thin wafers (70 μm) that would otherwise be too fragile.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The metallic shaped bodies act as intermediary elements that provide mechanical strength to thin wafers during handling and processing, while maintaining electrical functionality. They serve as both electrical contacts and structural reinforcement.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If metallic shaped bodies are used to protect electrical contacts, then contact reliability improves, but process complexity increases

Engineering Contradiction:
Improvecontact reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The manufacturing process is segmented into standard steps (wafer fabrication, chip separation, chip placement) plus the integration of metallic shaped bodies at appropriate stages. This maintains compatibility with existing processes while adding reliability through the metallic contact structures.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach prevents mechanical deformation and breakages, simplifies the handling process, and allows for precise placement of metallic shaped bodies without warpage, enhancing the reliability and efficiency of semiconductor chip manufacturing.

Implementation Method 1

arranging a plurality of metallic shaped bodies on a processed semiconductor wafer while forming a layer arranged between the semiconductor wafer and the shaped bodies, exhibiting a first connection material

Methodology Applied
Scientific EffectAdhesive bonding: Adhesive

Implementation Method 2

to carry out the sintering prior to the wire bonding

Methodology Applied
Scientific EffectSintering: Sintering

Implementation Method 3

the differences in the coefficients of thermal expansion of copper (Cu) and silicon (Si) are large and the sintering process takes place at relatively high temperatures

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS10607962B2Method for manufacturing semiconductor chips
Publication Date: 2020.03.31 DANFOSS SILICON POWER GMBH
  • US10607962B2 patent drawing
  • US10607962B2 patent drawing
  • US10607962B2 patent drawing

AI summary

A method for manufacturing semiconductor chips (2, 3) having arranged thereon metallic shaped bodies (6), having the following steps: arranging a plurality of metallic shaped bodies (6) on a processed semiconductor wafer while forming a layer arranged between the semiconductor wafer and the metallic shaped bodies (6), exhibiting a first connection material (4) and a second connection material (5), and processing the first connection material (4) for connecting the metallic shaped bodies (6) to the semiconductor wafer without processing the second connecting material (5), wherein the semiconductor chips (2, 3) are separated either prior to arranging the metallic shaped bodies (6) on the semiconductor wafer or after processing the first connection material (4).