Semiconductor Chip Mounting Using Temporary Fixer on Porous Silver Layer

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Solution Overview

Problem

The use of silver (Ag) layers with sintered structures for connecting chip mounting parts and semiconductor chips faces challenges such as positional deviations and increased crack risk due to the loss of tackiness during the drying process, leading to unreliable electrical connections.

Innovation Solution

A manufacturing method involving a temporarily fixing material with tackiness is applied to the Ag layer, allowing the semiconductor chip to be positively fixed in place before the sintering process, which helps in suppressing positional deviations and void formation by controlling the permeation of the fixing material into the Ag layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the Ag layer is formed by drying the paste to remove solvent, then void formation between the semiconductor chip and Ag layer is suppressed, but the Ag layer becomes porous and loses tackiness, causing positional deviation of the semiconductor chip

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidchip positioning accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A temporarily fixing material is introduced as an intermediary substance between the dried Ag layer and the semiconductor chip. This temporary material provides the necessary tackiness to hold the chip in position during mounting, while not interfering with the final sintered structure. After the chip is positioned, the temporary fixing material is removed, leaving the chip securely attached to the Ag layer through metallic bonds.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The Ag layer is pre-dried to form a porous structure before chip mounting to ensure void-free electrical connection. This preliminary drying action creates the optimal structure for electrical conductivity, and then the temporary fixing material is applied to address the positioning issue without compromising the already-formed porous Ag layer structure.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If heat and pressure are applied to form the sintered Ag layer, then metallic bonds between silver particles are formed and electrical resistivity is lowered, but cracks in the semiconductor chip may occur due to local pressure concentration from chip positional deviation

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidchip structural integrity
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The temporarily fixing material serves as a mediator that distributes the mounting pressure uniformly across the chip-Ag layer interface. By providing a compliant intermediate layer, it prevents stress concentration at specific points that would otherwise lead to chip cracking during the heat and pressure application process.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The temporary fixing material acts as a cushioning layer applied before the heat and pressure treatment. This cushioning effect protects the semiconductor chip from excessive local pressure during the sintering process, preventing cracks while still allowing the formation of strong metallic bonds in the Ag layer.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Object-affected harmful factors

If a lead-free Ag material is used instead of high-melting point solder, then environmental compatibility is improved and electric resistivity is lowered, but the Ag layer requires sintering process that complicates the manufacturing steps

Engineering Contradiction:
Improveenvironmental harm from leadVSAvoidmanufacturing process complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The temporarily fixing material is introduced as a temporary intermediary that facilitates the chip mounting process on the dried Ag layer. This additional material and step are necessary to enable the use of lead-free Ag materials with their superior electrical properties, as the temporary fixer allows for precise chip positioning that would otherwise be impossible with the porous dried Ag layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The manufacturing process utilizes parameter changes by controlling the drying conditions of the Ag paste to create a porous structure with specific characteristics. This controlled porosity, combined with the temporary fixing material, enables lead-free soldering with improved electrical properties while managing the increased process complexity through precise parameter control.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of the semiconductor device by stabilizing the chip's position and preventing voids, thereby reducing the risk of cracks and improving the electrical connection between the chip and the Ag layer.

Implementation Method 1

controlling the permeation of the fixing material into the Ag layer

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Implementation Method 2

forms metallic bonds with mutual silver particles by applying heat and pressure thereto

Methodology Applied
Scientific EffectSintering: Sintering

Implementation Method 3

the solvent is volatilized from the paste

Methodology Applied
Scientific EffectEvaporation: Evaporation

Data Source

PatentUS10262927B2Semiconductor device and manufacturing method thereof
Publication Date: 2019.04.16 RENESAS ELECTRONICS CORP
  • US10262927B2 patent drawing
  • US10262927B2 patent drawing
  • US10262927B2 patent drawing

AI summary

Reliability of a semiconductor device is improved. For this, embodied is a basic idea that a semiconductor chip (CHP1) mounted on an Ag layer (AGL) is fixed by using a temporarily fixing material (TA) having tackiness without forming the temporarily fixing material (TA) on a surface of the Ag layer (AGL) having a porous structure as much as possible, is realized. More specifically, the temporarily fixing material (TA) is supplied so as to have a portion made in contact with a chip mounting part (TAB), and the semiconductor chip (CHP1) is also mounted on the Ag layer (AGL) so that one portion of a rear surface of the semiconductor chip (CHP1) is made in contact with the temporarily fixing material (TA).