Semiconductor Chip Mounting with Through-Electrode Pitch Expansion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor device manufacturing methods face challenges in directly mounting semiconductor chips with narrow terminal electrode spacing onto standard wiring boards without using high-density multilayer wiring boards, which complicates the process and affects mechanical strength and heat conductivity.
Innovation Solution
A semiconductor device manufacturing method involving a semiconductor chip mounting step, insulating layer formation, through electrode formation, and external terminal electrode formation, where the semiconductor chip is mounted on a support board with an adhesive, and through electrodes connect terminal electrodes to external terminal electrodes with a larger spacing, allowing compatibility with standard wiring boards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a high-density multilayer wiring board is used to mount semiconductor chips with narrow terminal electrode spacing, then compatibility with narrow pitch chips is achieved, but device complexity increases and mechanical strength decreases
Solution Approach 1:
The wiring board is divided into multiple layers with different functions: a first wiring board layer provides mechanical support with large pitch terminals, while a second wiring board layer provides electrical connection with small pitch terminals. This segmentation allows each layer to be optimized independently, resolving the contradiction between supporting narrow pitch chips and maintaining structural simplicity.
Solution Approach 2:
The patent transitions from a single-plane wiring structure to a three-dimensional multilayer structure. By stacking wiring layers vertically and using through-electrodes to connect them, the patent enables electrical connection between large pitch terminals on the first layer and small pitch terminals on the second layer, effectively resolving the pitch mismatch problem without requiring the entire board to be high-density.
2Adaptability or versatility
If a high-density multilayer wiring board is used to mount semiconductor chips with narrow terminal electrode spacing, then compatibility with narrow pitch chips is achieved, but heat conductivity deteriorates
Solution Approach 1:
The thermal management function is separated from the electrical connection function. The first wiring board layer with large pitch terminals serves as the primary heat dissipation path, while the second layer handles electrical connections. This segmentation allows the first layer to be optimized for thermal conductivity without being constrained by the electrical connection requirements of narrow pitch terminals.
Solution Approach 2:
Through-electrodes serve as intermediaries that connect the first wiring board layer to the second wiring board layer. These through-electrodes provide both electrical connection and thermal conduction paths, enabling heat to flow from the semiconductor chip through the second layer's small pitch terminals to the first layer's large pitch terminals, thus maintaining good heat conductivity while supporting narrow pitch chips.
3Quantity of substance
If terminal electrode spacing of semiconductor chip is made smaller to increase pin count, then number of pins increases, but compatibility with standard wiring boards decreases
Solution Approach 1:
The patent uses vertical stacking of wiring layers to resolve the pitch incompatibility. The semiconductor chip's small pitch terminals connect to the second wiring board layer's small pitch terminals, while the first wiring board layer maintains large pitch terminals compatible with standard wiring boards. Through-electrodes provide the vertical connection path between layers, enabling the chip to achieve high pin count while maintaining compatibility with standard board infrastructure.
Solution Approach 2:
The wiring board is segmented into two functional layers: the first layer maintains compatibility with standard wiring boards using large pitch terminals, while the second layer adapts to the semiconductor chip's small pitch terminals. This segmentation allows the system to simultaneously support both high pin count requirements and standard board compatibility without requiring the entire board structure to be high-density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables direct electrical and thermal connection of semiconductor chips to standard wiring boards, enhancing mechanical strength and heat conductivity while maintaining compatibility with C4 bump pitch spacing, thus overcoming the limitations of previous methods.
Implementation Method 1
a semiconductor chip mounting step of mounting a semiconductor chip on a support board so as to expose a side of the semiconductor chip on which a plurality of terminal electrodes are provided
Data Source
AI summary
In a semiconductor device manufacturing method, a semiconductor chip is mounted on a support board so as to expose a side of the semiconductor chip on which a plurality of terminal electrodes are provided. An insulating layer is formed so as to cover the side of the semiconductor chip on which the terminal electrodes are provided. Through electrodes connecting to the terminal electrodes and piercing the insulating layer are formed. Metal wirings connecting to the through electrodes are formed on the insulating layer. External terminal electrodes connecting the metal wiring are formed. Second spacing, spacing between the adjacent external terminal electrodes, is larger than first spacing, spacing between the adjacent terminal electrodes.