Semiconductor Chip Pad with Copper and Aluminum Layers

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Solution Overview

Problem

Manufacturing solderable chip front sides with good electrical and mechanical contact properties, solderability, compatibility with various chip surfaces, and cost-effectiveness is challenging due to the need for materials and processes that prevent surface leakage current, corrosion, and compatibility with lead and lead-free solders.

Innovation Solution

A method involving the deposition of a titanium tungsten barrier layer and a copper layer on the chip front side, followed by selective etching to form chip pads with copper and aluminum surface layers, ensuring good adhesion and compatibility with soldering and wire bonding, while avoiding lift-off residues and intermetallic phases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a copper layer is deposited on the chip front side to achieve good electrical contact properties and solderability, then the electrical conductivity and solderability are improved, but the copper layer may cause surface leakage current and corrosion issues

Engineering Contradiction:
Improveelectrical contact properties and solderabilityVSAvoidsurface leakage current and corrosion
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A barrier layer is introduced as an intermediary between the copper layer and the chip front side surface. This barrier layer prevents direct contact between copper and the surface, thereby eliminating leakage current paths and corrosion issues while preserving the electrical conductivity and solderability of the copper layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The chip pad structure uses a composite material system consisting of multiple layers including the barrier layer and copper layer. This composite structure combines the beneficial properties of different materials: the barrier layer provides protection against leakage and corrosion, while the copper layer provides electrical conductivity and solderability.

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If selective removal of copper layer is performed to form chip pads, then the manufacturing precision of pad regions is improved, but the process complexity increases

Engineering Contradiction:
Improvechip pad region definitionVSAvoidmanufacturing process steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The barrier layer is deposited first before the copper layer, creating a predefined protective structure. This preliminary action allows for controlled selective removal of copper in subsequent steps while the barrier layer remains intact to protect underlying structures, thereby achieving precise pad formation with manageable process complexity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach creates versatile chip pads that are solderable and bondable, providing stable electrical and mechanical connections, compatible with lead and lead-free solders, and reducing manufacturing complexity and costs, while preventing corrosion and leakage currents.

Implementation Method 1

depositing a barrier layer over a chip front side

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

depositing a copper layer after depositing the barrier layer

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS10636754B2Semiconductor chip and method for forming a chip pad
Publication Date: 2020.04.28 INFINEON TECHNOLOGIES AG
  • US10636754B2 patent drawing
  • US10636754B2 patent drawing
  • US10636754B2 patent drawing

AI summary

A semiconductor chip with different chip pads and a method for forming a semiconductor chip with different chip pads are disclosed. In some embodiments, a semiconductor chip includes a chip front side, a first chip pad located on the chip front side, a second chip pad located on the chip front side and an electrically insulating material located between the first chip pad and the second chip pad, wherein the first chip pad includes a surface layer predominantly comprising copper and the second chip pad includes a surface layer predominantly comprising aluminum.