Semiconductor Chip Pad Reduction via Internal Signal Generation
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Solution Overview
Problem
Existing semiconductor systems require an increasing number of channels and pads as the number of stacked and packaged semiconductor chips increases, leading to a notable limitation in integration and area usage.
Innovation Solution
A semiconductor integrated circuit with a reduced number of pads for receiving chip selection signals is achieved by using a chip selection signal generator that generates signals in response to one control signal for driving the chips and another for selecting them, allowing the number of pads to be equal to or less than the number of semiconductor chips, thereby reducing the area and channel requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of stacked and packaged semiconductor chips is increased to acquire greater capacity, then the storage capacity is improved, but the number of channels and pads required increases leading to area limitation
Solution Approach 1:
The patent combines multiple chip selection functions into a single pad by integrating a chip selection signal generator within the semiconductor chip. This generator produces multiple chip selection signals from a single received chip selection signal, allowing one pad to serve multiple chips simultaneously, thereby reducing the total number of pads required as chips are stacked
Solution Approach 2:
The single chip selection signal generator performs multiple functions: it receives one chip selection signal and generates multiple differentiated chip selection signals for different chips. This multi-functional approach allows one pad to control multiple chips, reducing the area required for pads while maintaining control over increased chip capacity
2Quantity of substance
If the number of stacked and packaged semiconductor chips is increased to acquire greater capacity, then the storage capacity is improved, but the number of channels required increases leading to integration limitation
Solution Approach 1:
The patent merges multiple channel functions into a single channel by placing the chip selection signal generator inside the semiconductor chip. This allows one external channel to control multiple chips through the internal signal generation capability, reducing the number of external channels needed and simplifying the overall system integration
Solution Approach 2:
The patent moves the chip selection signal generation function from the external controller domain to the internal chip domain. This dimensional shift in functionality reduces the complexity of external channel management while enabling increased chip stacking capacity
3Area of stationary object
If one pad is used to receive chip selection signals for multiple semiconductor chips, then the number of pads is reduced, but the chip selection signal generator complexity increases
Solution Approach 1:
The semiconductor chip performs self-service by including an internal chip selection signal generator that automatically produces the necessary chip selection signals for multiple chips. This eliminates the need for external complexity in pad management and distributes the signal generation task within the chip itself, reducing overall system complexity despite the internal generator's functionality
Data Source
AI summary
A semiconductor integrated circuit includes a plurality of semiconductor chips respectively selected in response to a plurality of chip selection signals, and a chip selection signal generator configured to generate the chip selection signals in response to one first control signal for deciding whether to drive the semiconductor chips and at least one second control signal for selecting at least one semiconductor chip from among the semiconductor chips.