Semiconductor Chip Pad Segmentation for Stress Reduction
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Solution Overview
Problem
The miniaturization and increased functionality of semiconductor chips lead to reduced design freedom and potential physical stress on internal circuit elements during testing, limiting reliability and connectivity options.
Innovation Solution
A semiconductor chip design featuring a redistribution wiring test pad and connection pad, which are spaced apart from the chip pad, allowing for enhanced design flexibility and reducing physical stress on internal circuit elements by not overlapping memory cell arrays, thus improving reliability and connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the connection pad is disposed in limited locations for electrical connection, then the electrical connectivity is maintained, but the degree of freedom of chip design is reduced
Solution Approach 1:
The connection pad is divided into two separate pads: a redistribution wiring test pad for testing purposes and a redistribution wiring connection pad for electrical connection. This segmentation allows each pad to be disposed in optimal locations independently, enhancing design freedom while maintaining electrical connectivity functionality.
Solution Approach 2:
A redistribution wiring structure is introduced as an intermediary element that electrically connects the chip pad to both the test pad and connection pad. This mediator enables flexible pad placement by providing an indirect electrical connection path, thereby increasing design adaptability without compromising electrical connectivity.
2Reliability
If testing is performed using the connection pad, then electrical connection testing is achieved, but physical stress is applied to internal circuit elements such as memory cell array
Solution Approach 1:
The testing function is extracted from the connection pad and assigned to a dedicated redistribution wiring test pad. This separation allows testing operations to be performed on the test pad without applying physical stress to internal circuit elements, while the connection pad remains dedicated to electrical connection purposes.
Solution Approach 2:
The redistribution wiring structure serves as an intermediary that provides a separate testing path through the test pad, isolating the testing process from direct interaction with internal circuit elements. This mediator enables reliability testing while protecting sensitive internal structures from physical stress.
3Adaptability or versatility
If the chip is miniaturized and multi-functioned, then functionality is enhanced, but design freedom is reduced and reliability may be compromised
Solution Approach 1:
The pad structure is segmented into multiple specialized pads (test pad and connection pad) with distinct functions. This segmentation enables multi-functionality at the pad level while maintaining clear separation of concerns, allowing the miniaturized chip to perform multiple functions without compromising reliability through functional isolation.
Solution Approach 2:
Different regions of the chip are assigned different qualities and functions: the test pad region is optimized for testing operations without internal circuit elements, while the connection pad region is optimized for electrical connection. This local differentiation enables multi-functionality while protecting critical areas from stress and interference.
Data Source
AI summary
A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.