Semiconductor Chip Peripheral Area Conductive Reference Lines

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Solution Overview

Problem

The existing semiconductor chip manufacturing processes face challenges in increasing sorting margins and reducing defective devices without additional investments in photolithography equipment, particularly due to the limitations in scribe lane widths and the integration of complex process patterns.

Innovation Solution

The introduction of semiconductor chips with a substrate having a circuit area and a peripheral area, featuring conductive reference lines and key areas that overlap with the circuit and peripheral areas, allowing for reduced scribe lane widths and increased chip sizes or numbers without additional equipment, thereby enhancing productivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If scribe lane widths are reduced to increase chip size or number per wafer, then productivity increases, but sorting margins decrease and manufacturing precision deteriorates

Engineering Contradiction:
Improvechip size or number of chips per waferVSAvoidsorting margins
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent introduces conductive reference lines extending in a first direction parallel to the edges of the circuit area, and key areas that overlap both the circuit area and peripheral area. This dimensional arrangement allows sorting and measurement functions to be performed in the peripheral area without encroaching on the circuit area, thereby maintaining sorting margins even when scribe lane widths are reduced.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The conductive reference lines and key areas serve as intermediary elements placed in the peripheral area. These intermediaries enable precise measurement and sorting of semiconductor chips without requiring additional space in the scribe lane, thus resolving the conflict between productivity and manufacturing precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If complex process patterns are integrated to improve device functionality, then reliability improves, but manufacturing complexity increases

Engineering Contradiction:
Improvedevice functionalityVSAvoidprocess patterns
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the substrate into distinct functional areas: a circuit area containing drive circuit cells, and a peripheral area containing conductive reference lines and key areas. This segmentation allows complex process patterns to be confined to specific regions, simplifying the overall manufacturing process while maintaining device functionality.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If additional photolithography devices are invested in to improve sorting precision, then manufacturing precision improves, but manufacturing cost increases

Engineering Contradiction:
Improvesorting precisionVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The conductive reference lines and key areas are formed as integral parts of the semiconductor chip structure during the standard manufacturing process. These features enable sorting and measurement functions to be performed using existing equipment and processes, eliminating the need for additional photolithography devices while maintaining sorting precision.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10622312B2Semiconductor chips and semiconductor packages including the same
Publication Date: 2020.04.14 SAMSUNG ELECTRONICS CO LTD
  • US10622312B2 patent drawing
  • US10622312B2 patent drawing
  • US10622312B2 patent drawing

AI summary

A semiconductor chip includes a substrate including a circuit area having a rectangular shape and a peripheral area surrounding the circuit area, a key area being overlapping a part of the circuit area and a part of the peripheral area, a plurality of drive circuit cells in the circuit area, and a conductive reference line on the peripheral area and extending in a first direction parallel to a first edge among four edges of the rectangular shape of the circuit area.