Semiconductor Chip Sealing Ring with Segmented Metal Gaps
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Solution Overview
Problem
The formation of gaps in metal sealing rings on gallium arsenide substrates during vapor deposition makes it difficult to create a completely closed ring shape, leading to potential cracks in the substrate or protective film under external stress, which can allow impurities to enter the semiconductor chip.
Innovation Solution
A semiconductor chip design featuring a compound semiconductor substrate with first metals arranged in a ring shape around the circuit and second metals positioned between the circuit and the first metals or closer to the edge, with at least part of the second metals overlapping the gaps between the first metals, providing a sealing ring configuration that suppresses crack development and impurity entry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal sealing ring is formed on a gallium arsenide substrate by vapor deposition, then a sealing structure can be created, but gaps are generated in the metal making it difficult to form a completely closed ring shape
Solution Approach 1:
The continuous metal sealing ring is segmented into multiple discrete metal pieces arranged in a ring shape. This segmentation allows each metal piece to be independently positioned and connected to adjacent pieces, enabling the formation of a closed ring structure that overcomes the gap formation issue in vapor deposition while maintaining sealing functionality.
Solution Approach 2:
A connection structure is introduced as an intermediary element to join adjacent metal pieces together. This connection structure bridges the gaps between metal segments, forming a continuous electrical and mechanical path that ensures the sealing ring functions as a complete closed loop despite the segmented construction.
2Ease of manufacture
If a metal sealing ring is formed with gaps, then manufacturing is simplified, but cracks can enter from the gap and develop to the inside of the semiconductor chip when stress is applied
Solution Approach 1:
The connection structure serves as a mediator that bridges gaps between metal segments, providing a continuous path that prevents crack propagation. This intermediary element maintains the mechanical integrity of the sealing ring while allowing the simplified segmented manufacturing process to be used.
Solution Approach 2:
The connection structure is designed in advance to compensate for potential stress and crack formation. By pre-establishing a continuous structural path between metal segments, the design cushions against the harmful effects of external stress before cracks can develop and propagate into the semiconductor chip.
3Reliability
If the metal sealing ring is made continuous and closed, then crack development is suppressed, but manufacturing precision requirements increase making it difficult to form on gallium arsenide substrates
Solution Approach 1:
The continuous metal sealing ring is divided into multiple segments that can be independently manufactured and positioned. This segmentation reduces the manufacturing precision requirements for each individual metal piece while the connection structure ensures they form a complete closed ring, achieving both crack suppression and manufacturability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents crack propagation and impurity entry across the entire circumference of the semiconductor chip, enhancing its reliability and reducing chip size by maintaining a ground potential for the metals through an active layer.
Implementation Method 1
the plurality of second metals each are positioned, in plan view of the side surface of the compound semiconductor substrate, such that at least a part of the second metal overlaps a gap between the first metals
Implementation Method 2
when a metal is formed on a gallium arsenide (GaAs) substrate by vapor deposition
Data Source
AI summary
A semiconductor chip includes a compound semiconductor substrate having a pair of main surfaces and a side surface therebetween, a circuit on one main surface of the pair of main surfaces, and first metals on the main surface. The first metals are positioned, in plan view of the main surface, closer to an outer edge of the main surface than the circuit, substantially in a ring shape to surround the circuit with gaps between first metals adjacent to each other. The semiconductor chip further includes second metals on the main surface. The second metals are positioned, in plan view of the main surface, between the circuit and the first metals or closer to the outer edge than the first metals. Also, the second metals each are positioned, in plan view of the side surface, such that at least a part thereof overlaps a gap between the first metals.