Semiconductor Package Chip Selection Via Segmentation
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Solution Overview
Problem
Existing semiconductor packages with through-vias struggle to selectively connect specific chips among stacked semiconductor chips, making it difficult to choose a particular chip during data processing due to the uniform electrical connection provided by through-silicon vias (TSVs).
Innovation Solution
The semiconductor package employs a unique arrangement of chip selection vias and connection units between stacked semiconductor chips, where some vias are connected and others disconnected in an inverse order, allowing for the selection of specific chips by altering the signal paths through the use of insulation layers and connection vias, enabling different signal inputs to each chip layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If through-vias are used to connect stacked semiconductor chips, then data processing speed is improved, but chip selection capability deteriorates
Solution Approach 1:
The through-vias are segmented into different types: signal transmission vias that connect all chips and chip selection vias that can be selectively connected or disconnected. This segmentation allows simultaneous high-speed data transmission and individual chip selection capability.
Solution Approach 2:
The chip selection vias are designed to be dynamically controllable, allowing the electrical connection state to be changed based on which chip needs to be selected. This dynamic switching capability enables selective chip activation while maintaining high-speed communication paths.
2Adaptability or versatility
If the stack structure is modified to connect signal wire and specific chip, then chip selection capability is improved, but manufacturing complexity increases
Solution Approach 1:
The same via structure serves multiple functions: signal transmission vias handle high-speed data communication, while chip selection vias handle chip selection. Both use identical through-silicon via fabrication processes, allowing uniform manufacturing across all chips in the stack.
Solution Approach 2:
Instead of modifying each chip's internal structure to enable selection, the invention inverts the approach by using external control mechanisms (connection units between chips) to achieve chip selection, maintaining simplicity in individual chip design while enabling selection capability at the package level.
3Adaptability or versatility
If separate connection paths are provided for each chip, then chip selection capability is improved, but manufacturing complexity increases
Solution Approach 1:
Multiple chip selection vias are merged into a single connection unit structure that controls selection for multiple chips simultaneously. The connection units between adjacent chips are designed to handle multiple via connections in an integrated manner, simplifying the manufacturing process compared to providing entirely separate connection paths for each chip.
Data Source
AI summary
A semiconductor package includes: first, second, third and fourth semiconductor chips stacked while having the arrangement of chip selection vias; and a connection unit provided between a second semiconductor chip and a third semiconductor chip, and configured to mutually connect some of the chip selection vias of the second and third semiconductor chips and disconnect the others of the chip selection vias of the second and third semiconductor chips, wherein the first and second semiconductor chips and the third and fourth semiconductor chips are stacked in a flip chip type.