Method for producing a radiation emitting semiconductor chip and radiation emitting semiconductor chip

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Solution Overview

Problem

Current methods for producing radiation emitting semiconductor chips are complex and require multiple lithography steps, making them difficult and time-consuming.

Innovation Solution

A method involving a semiconductor layer sequence with an active region, a reflective layer sequence, and a dielectric mirror layer, where a first recess is generated through a single mask opening, allowing for the application of a dielectric mirror layer and subsequent contact layers to simplify the production process, reducing the number of steps required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple lithography steps are used to produce radiation emitting semiconductor chips, then manufacturing precision can be maintained, but device complexity and production time increase significantly

Engineering Contradiction:
Improvelithography precisionVSAvoidproduction process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple lithography steps into a single lithography step by designing a mask pattern that defines both the first recess (for the dielectric mirror layer) and the second recess (for the contact opening) simultaneously. This merging approach maintains manufacturing precision while significantly reducing process complexity and production time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single lithography step serves multiple functions: it defines the pattern for the dielectric mirror layer recess, the contact opening recess, and the alignment between these features. This multi-functional approach eliminates the need for separate lithography steps while maintaining the required precision for each feature.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If multiple lithography steps are used, then precise alignment can be achieved, but production time and process steps increase

Engineering Contradiction:
Improvealignment precisionVSAvoidproduction time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

Multiple alignment operations are merged into a single lithography step where the mask pattern simultaneously defines the positions of the dielectric mirror layer recess and the contact opening recess. This eliminates repeated alignment operations while maintaining precise relative positioning between features.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If a complex multi-step process is used, then high quality radiation emitting chips can be produced, but productivity decreases

Engineering Contradiction:
Improvechip qualityVSAvoidproduction efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges multiple process steps (multiple lithography steps, multiple etching steps, multiple deposition steps) into a reduced sequence of operations. The single lithography step followed by selective etching and dielectric layer deposition maintains chip quality while significantly improving production efficiency by reducing the total number of process steps.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method simplifies the production of radiation emitting semiconductor chips by reducing the number of lithography steps, enabling efficient electrical contact and high reflection coefficients for electromagnetic radiation, thereby improving light extraction and efficiency.

Implementation Method 1

The reflective layer sequence is a Bragg mirror. The Bragg mirror may include alternately arranged sub-layers of a high refractive index material and a low refractive index material.

Methodology Applied
Scientific EffectBragg reflection: Bragg Diffraction

Implementation Method 2

The active region may have a pn-junction for generating the electromagnetic radiation

Methodology Applied
Scientific EffectLight emission from pn-junction: Light Emitting Diode

Implementation Method 3

The reflective layer sequence is applied, for example, by a physical vapour deposition, such as sputtering or vapour deposition

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 4

The reflective layer sequence is applied, for example, by a physical vapour deposition, such as sputtering or vapour deposition, or by a chemical vapour deposition over the semiconductor layer sequence

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS12255263B2Method for producing a radiation emitting semiconductor chip and radiation emitting semiconductor chip
Publication Date: 2025.03.18 OSRAM OPTO SEMICON GMBH & CO OHG
  • US12255263B2 patent drawing
  • US12255263B2 patent drawing
  • US12255263B2 patent drawing

AI summary

A method for producing a radiation emitting semiconductor chip may include providing a semiconductor layer sequence having an active region configured to generate electromagnetic radiation, applying a reflective layer sequence over the semiconductor layer sequence, generating a first recess through an opening of a mask where the first recess completely penetrates the reflective layer sequence and the active region, and applying a dielectric mirror layer in the first recess through the same opening of the same mask. Furthermore, a radiation emitting semiconductor chip is disclosed.