Semiconductor Chip Embedding in Sintered Member Recess
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Solution Overview
Problem
Existing semiconductor devices face reliability and insulation performance issues due to debonding of the sealant from the semiconductor chip caused by thermal stress, which is exacerbated by the difference in thermal expansion coefficients between the chip and the sealant, leading to poor adhesion and potential exposure of the chip.
Innovation Solution
A semiconductor device configuration featuring a sintered member with a recess and frame on an insulated circuit board, where the semiconductor chip is embedded such that its top face is closer to the conductive pattern layer than the frame's top end, allowing a coating material to cover the chip and prevent sealant debonding by trapping it within the frame, enhancing adhesion and stress relief.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a sealant is applied to seal the semiconductor chip, then sealing protection is provided, but thermal stress causes debonding between the sealant and chip
Solution Approach 1:
A coating material is introduced as an intermediary layer between the semiconductor chip and the sealant. This coating material has adhesion promoting properties that enhance bonding between the chip and sealant, preventing debonding caused by thermal expansion differences during operation
Solution Approach 2:
The surface properties of the semiconductor chip are modified by applying a coating material with different thermal expansion characteristics. This coating layer acts as a buffer that accommodates thermal stress, changing the effective thermal parameters of the chip-sealant interface to reduce stress concentration
2Reliability
If the semiconductor chip is mounted on the circuit board, then electrical connection is achieved, but the chip may be exposed due to insufficient coating material
Solution Approach 1:
The coating material is applied to the semiconductor chip before the sealing process. This preliminary coating ensures that the chip surface is pre-covered with adhesion-promoting material, preventing exposure during subsequent sealing operations and ensuring uniform thickness distribution
3Strength
If the top face of the semiconductor chip is covered with coating material, then adhesion is improved, but the coating material may flow out of the sealing region
Solution Approach 1:
A dam structure is formed on the circuit board before applying the coating material to the semiconductor chip. This dam creates a physical barrier that confines the coating material within the sealing region, preventing it from flowing out during the sealing process while still allowing the coating to perform its adhesion function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents sealant debonding from the semiconductor chip due to thermal stress, ensuring reliable adhesion and maintaining insulation performance by trapping the coating material within the frame of the sintered member, thus preventing exposure and ensuring sufficient thickness.
Implementation Method 1
a sintered member disposed on the conductive pattern layer
Data Source
AI summary
A semiconductor device includes an insulated circuit board having a conductive pattern layer, a sintered member disposed on the conductive pattern layer, a semiconductor chip placed on the sintered member, and a coating material covering the semiconductor chip. The sintered member has, on a surface thereof opposite to the conductive pattern layer, a frame shaping the outer edge of a recess. The semiconductor chip is mounted in the recess such that its top face is located closer to the conductive pattern layer than a top end of the frame.