Semiconductor Chip Surface Topography Metrology Using Interference Signals
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Solution Overview
Problem
Current surface topography metrology methods for semiconductor chips, such as atomic force microscopy (AFM) and electron microscopy, face challenges with low throughput, high cycle times, and reliability issues due to large measurement ratios, while conventional white light interferometry lacks accuracy and precision for wafer surface topography measurements.
Innovation Solution
The system employs interference signals and spectrum signals, combined with machine learning models, to classify and calibrate surface topography measurements, utilizing an interferometer and spectrometer to provide high-throughput, accurate, and precise measurements without the need for opaque film deposition or wafer consumption, and extends the light source spectrum to improve signal-to-noise ratio and repeatability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If atomic force microscopy (AFM) or electron microscopy is used for surface topography measurement, then measurement precision is improved, but productivity deteriorates due to low throughput and high cycle times
Solution Approach 1:
The patent replaces mechanical contact-based measurement systems (AFM) with optical interference-based measurement systems. The optical system uses light interference patterns to measure surface topography without physical contact, enabling parallel measurement of multiple points simultaneously, thus dramatically improving throughput while maintaining precision.
Solution Approach 2:
The patent transitions from single-point sequential measurement to multi-point parallel measurement by capturing interference patterns across the entire wafer surface using optical cameras. This dimensional expansion from 1D scanning to 2D/3D simultaneous capture enables high-throughput measurement without sacrificing precision.
2Productivity
If conventional white light interferometry is used for measurement, then productivity is improved through high throughput, but measurement precision deteriorates due to insufficient accuracy for wafer surface topography
Solution Approach 1:
The patent modifies the interferometry parameters by using extended spectrum light sources (beyond conventional white light) and implementing sophisticated phase extraction algorithms. These parameter changes enhance the signal-to-noise ratio and improve measurement accuracy while maintaining high throughput capabilities.
Solution Approach 2:
The patent implements preliminary calibration measurements using known reference surfaces to establish baseline data. This preliminary action enables the system to compensate for systematic errors and improve measurement accuracy for subsequent wafer topography measurements without reducing throughput.
3Measurement precision
If extended spectrum light source is used, then measurement precision is improved through enhanced signal-to-noise ratio, but device complexity increases
Solution Approach 1:
The patent designs the optical system with a multi-functional extended spectrum light source that can operate across multiple wavelength ranges. This universal light source serves multiple measurement functions and can be adjusted for different measurement conditions, reducing the need for multiple specialized devices and thereby limiting complexity increase.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient, high-throughput inline measurement of semiconductor chip surface topography with enhanced accuracy and precision, suitable for mass production, while reducing the thickness requirements and improving the reliability of measurements.
Implementation Method 1
A plurality of interference signals each corresponding to a respective one of a plurality of positions on a surface of the semiconductor chip are received
Data Source
AI summary
Embodiments of systems and methods for measuring a surface topography of a semiconductor chip are disclosed. In an example, a method for measuring a surface topography of a semiconductor chip is disclosed. A plurality of interference signals each corresponding to a respective one of a plurality of positions on a surface of the semiconductor chip are received by at least one processor. The interference signals are classified by the at least one processor into a plurality of categories using a model. Each of the categories corresponds to a region having a same material on the surface of the semiconductor chip. A surface height offset between a surface baseline and at least one of the categories is determined by the at least one processor based, at least in part, on a calibration signal associated with the region corresponding to the at least one of the categories. The surface topography of the semiconductor chip is characterized by the at least one processor based, at least in part, on the surface height offset and the interference signals.