Semiconductor Chip Tampering Feature via Photo-Transistor Trigger
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Solution Overview
Problem
Existing semiconductor chips lack a reliable mechanism to disable themselves upon detection of tampering, which is crucial for secure operations in sensitive applications.
Innovation Solution
The development of transient electronic devices that incorporate a heterojunction field-effect photo-transistor (PHJFET) as a triggering mechanism, which, upon exposure to light, activates a reactive layer to disable the electronic circuitry through chemical reactions or heat generation, ensuring the chip's destruction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a semiconductor chip is designed to function indefinitely, then reliability is improved, but the ability to disable upon tampering is lost
Solution Approach 1:
The patent implements a dynamic system where the chip transitions from a stable, functional state to a destroyed, non-functional state upon detecting tampering conditions. The PHJFET circuit remains dormant during normal operation but activates destructively when exposed to light, enabling the chip to adapt its behavior based on environmental conditions.
Solution Approach 2:
The invention changes the operational parameters of the chip by introducing light sensitivity through the PHJFET. Under normal lighting conditions, the chip functions normally, but when exposed to specific light conditions indicating tampering, the parameter change triggers a destructive response that disables the chip.
2Reliability
If a reactive layer is added to enable tamper destruction, then security is improved, but device complexity increases
Solution Approach 1:
The patent merges the reactive layer with the existing semiconductor substrate, integrating the security function into the chip structure itself rather than adding separate security modules. The reactive layer is positioned between the PHJFET and the substrate, combining multiple functions in a single integrated structure.
Solution Approach 2:
The PHJFET circuit serves multiple functions: it acts as a normal switching circuit during fabrication and operation, and simultaneously serves as a light-sensitive trigger for the destructive response. This multi-functionality reduces the need for separate dedicated security components.
3Measurement precision
If a PHJFET triggering mechanism is implemented, then light sensitivity is improved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the fabrication process into distinct stages: front-end-of-line (FEOL) processes for creating the PHJFET circuit, mid-end processes for forming the reactive layer, and back-end-of-line (BEOL) processes for encapsulation. This segmentation allows each stage to be optimized independently while maintaining overall compatibility.
Solution Approach 2:
The PHJFET circuit is formed during FEOL processes before the reactive layer is deposited, allowing the light-sensitive triggering mechanism to be established early in the fabrication sequence. This preliminary action ensures that subsequent processing steps can build upon the already-formed circuit structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables fast and thorough destruction of the chip upon tampering, maintaining stability under normal conditions and being compatible with both front-end and back-end-of-line fabrication processes, with excellent light sensitivity.
Implementation Method 1
exposure of a heterojunction field-effect photo-transistor (PHJFET) to light is used as a trigger mechanism
Implementation Method 2
activates a reactive layer to disable the electronic circuitry through chemical reactions or heat generation
Data Source
AI summary
Silicon-based or other electronic circuitry is dissolved or otherwise disabled by reactive materials within a semiconductor chip should the chip or a device containing the chip be subjected to tampering. Triggering circuits containing normally-OFF heterojunction field-effect photo-transistors are configured to cause reactions of the reactive materials within the chips upon exposure to light. The normally-OFF heterojunction field-effect photo-transistors can be fabricated during back-end-of-line processing through the use of polysilicon channel material, amorphous hydrogenated silicon gate contacts, hydrogenated crystalline silicon source/drain contacts, or other materials that allow processing at low temperatures.