Semiconductor Chipping Detection via Terminal Voltage Clamping
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Solution Overview
Problem
The existing semiconductor device configurations for detecting chipping during the dicing process require additional terminals for inspection, leading to an increase in the number of terminals needed, which is undesirable.
Innovation Solution
A semiconductor device configuration that includes a voltage clamp unit and a constant current source, utilizing a PMOS transistor and voltage dividing resistors to detect chipping by monitoring the terminal voltage, which is clamped to a specific voltage in the presence or absence of a broken wire, allowing for chipping detection without the need for additional inspection terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional inspection terminals are added to detect chipping, then chipping detection capability is improved, but the number of terminals increases
Solution Approach 1:
The patent makes existing terminals serve dual purposes: their original function plus chipping detection function. The first terminal (power supply terminal) and second terminal (output terminal) are used for both their intended purposes and for detecting chipping by measuring voltage relationships, eliminating the need for dedicated inspection terminals.
Solution Approach 2:
The system uses its own operational parameters (voltage at power supply terminal and output terminal during normal operation) to detect chipping. The existing voltage measurements required for normal operation are also utilized to detect wiring breaks, making the system self-diagnostic without requiring external inspection infrastructure.
2Reliability
If inspection wiring is formed around the periphery of the semiconductor chip, then chipping detection is enabled, but the wiring is more susceptible to broken wire portions
Solution Approach 1:
The patent extracts the chipping detection function from a separate inspection wiring structure and integrates it into the existing power supply and output wiring paths. By using the same wiring that carries power and signal for detection purposes, the need for additional peripheral inspection wiring is eliminated.
Solution Approach 2:
The patent combines the chipping detection function with the existing power supply wiring and output wiring. The same physical wiring structures serve both their original functional purpose and the detection purpose, merging multiple functions into existing components rather than adding separate detection infrastructure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables effective detection of chipping without increasing the number of terminals, as the same terminals used for original functions can be utilized for chipping detection, maintaining the device's operational integrity.
Implementation Method 1
a voltage clamp unit, and a wiring disposed along an outer periphery of the semiconductor chip and between the voltage clamp unit and the pad, in which, in a case in which the wiring has no broken wire portion, a terminal voltage generated at the terminal is clamped to a clamp voltage by the voltage clamp unit
Implementation Method 2
the voltage clamp unit may include a first p-channel metal-oxide semiconductor (PMOS) transistor having a source connected to the pad via the wiring
Implementation Method 3
the semiconductor chip may include a constant current source configured to cause a current to flow into the pad
Implementation Method 4
the voltage clamp unit may include voltage dividing resistors configured to divide a reference voltage into a sub-voltage applied to a gate of the first PMOS transistor
Data Source
AI summary
Disclosed herein is a semiconductor device configured by packaging a semiconductor chip, including at least one terminal. The semiconductor chip includes a pad connected to the terminal, a voltage clamp unit, and a wiring disposed along an outer periphery of the semiconductor chip and between the voltage clamp unit and the pad. In a case in which the wiring has no broken wire portion, a terminal voltage generated at the terminal is clamped to a clamp voltage by the voltage clamp unit, and in a case in which the wiring has a broken wire portion, the terminal voltage reaches a predetermined voltage higher than the clamp voltage or a predetermined voltage lower than the clamp voltage.