Semiconductor Circuit Design Using Aging SPICE Simulation

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Solution Overview

Problem

Current SoC chip design reliability analysis relies on worst-case assumptions, leading to overdesign and inefficiencies due to the lack of consideration for actual usage conditions, such as voltage and temperature variations, which results in pessimistic estimates of electrical characteristics and performance optimization.

Innovation Solution

A semiconductor device design system that incorporates an aging spice model, netlist, modes of operation, aged database, and simulator to simulate the effects of device aging under various usage conditions, optimizing the characterization of timing libraries and reducing the design margin by considering specific operating modes and their impact on electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If worst-case assumption is used for reliability analysis, then reliability estimate is conservative, but design margin is excessive and overdesign occurs

Engineering Contradiction:
Improvereliability estimateVSAvoiddesign margin
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the parameter of reliability analysis from worst-case assumption to usage-condition-based simulation. By introducing usage conditions (voltage, temperature, time variations) as simulation parameters, the system calculates actual aging effects rather than relying on conservative estimates, thereby reducing excessive design margin while maintaining adequate reliability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the mechanical/conventional approach of worst-case assumption with a simulation-based approach using SPICE tools. This substitution allows for more precise calculation of aging effects under actual usage conditions, replacing the overly conservative mechanical methodology with a more sophisticated computational approach.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If worst-case assumption is used, then reliability is ensured, but power consumption and manufacturing cost increase due to overdesign

Engineering Contradiction:
Improvechip reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the reliability analysis parameters from fixed worst-case values to dynamic usage-condition-based parameters. By simulating aging effects under actual voltage, temperature, and time variations, the system determines optimal design margins that balance reliability with power consumption, eliminating unnecessary power reserves required by overdesign.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If usage conditions are considered in simulation, then design accuracy is improved, but simulation time and computational complexity increase

Engineering Contradiction:
Improveelectrical characteristic prediction accuracyVSAvoidsimulation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-defining usage conditions and aging models before simulation. By preparing usage condition scenarios (voltage, temperature, time profiles) in advance and pre-configuring the SPICE simulation framework, the system reduces actual simulation time while maintaining high accuracy in predicting electrical characteristics under varying conditions.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10176284B2Semiconductor circuit design and manufacture method
Publication Date: 2019.01.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10176284B2 patent drawing
  • US10176284B2 patent drawing
  • US10176284B2 patent drawing

AI summary

A method performed by a processor, the method including preparing a netlist describing a first circuit including an active component; obtaining an original electrical characteristic of the active component, wherein an electrical characteristic of the active component is the original electrical characteristic in a condition that the active component has not been operated; obtaining an aged data describing a variation in the original electrical characteristic, wherein the variation is caused by operating the first circuit under a first mode and a second mode different from the first mode during a time period; providing a simulation result by simulating, based on an aged electrical characteristic, the first circuit operating under the first mode and the second mode during the time period, wherein the aged electrical characteristic is a combination of the original electrical characteristic and the variation.