Semiconductor Circuit Board Thermal Management via Surface Roughness Control
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Solution Overview
Problem
Current semiconductor circuit boards lack effective heat dissipation methods, particularly for high-temperature semiconductor elements like SiC and GaN, due to inadequate thermal resistance reduction and inefficient heat transfer paths, which can lead to thermal runaway and device failure.
Innovation Solution
A semiconductor circuit board design featuring a conductor portion on an insulating substrate with controlled surface roughness and thickness ratios, using ceramic substrates and metal plates with optimized bonding layers, allowing for direct bonding or use of bonding materials to enhance heat dissipation in both lateral and longitudinal directions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If conventional solder material is used to bond the chip and electrode circuit material, then bonding is achieved, but the operating temperature decreases to the melting point of the solder material or lower
Solution Approach 1:
The patent changes the material parameter from conventional solder to high-melting-point brazing material (Ag-Cu system with melting point above 600°C), enabling the bonding structure to withstand the high operating temperatures required for SiC and GaN semiconductor devices while maintaining bonding reliability
Solution Approach 2:
The patent employs composite material structure combining Ag-Cu brazing material with Cu-W or Cu-Mo heat dissipation substrates, creating a multi-material system that simultaneously achieves high-temperature resistance, strong bonding, and effective heat dissipation for next-generation semiconductor devices
2Temperature
If heat dissipation area is increased to reduce thermal resistance, then thermal resistance decreases, but device size increases
Solution Approach 1:
The patent transitions from single-sided heat dissipation to double-sided heat dissipation structure, utilizing both the front and back surfaces of the Cu-W or Cu-Mo heat dissipation substrate to dissipate heat, effectively doubling the heat dissipation area without proportionally increasing the device footprint
Solution Approach 2:
The patent applies localized high-thermal-conductivity materials (Cu-W or Cu-Mo) specifically at the heat dissipation critical zones beneath the semiconductor chip, concentrating thermal management resources where most needed rather than uniformly distributing them across the entire device
3Reliability
If high-melting point brazing material is used to enhance bonding reliability at high temperatures, then bonding reliability improves, but heat dissipation performance deteriorates due to material thermal conductivity limitations
Solution Approach 1:
The patent creates a composite material system where Ag-Cu brazing material provides high-temperature bonding reliability while Cu-W or Cu-Mo heat dissipation substrates provide superior thermal conductivity, with the brazing material serving as a bonding layer rather than the primary heat dissipation path
Solution Approach 2:
The Ag-Cu brazing material acts as an intermediary bonding layer that connects the semiconductor chip to the Cu-W or Cu-Mo heat dissipation substrate, enabling thermal and mechanical connection without requiring the brazing material itself to be the primary heat dissipation medium
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design significantly improves heat dissipation and planarity, preventing thermal runaway and ensuring reliable operation of high-temperature semiconductor elements by reducing thermal resistance and maintaining bonding integrity under increased heat generation.
Implementation Method 1
thermal resistance reduction
Data Source
AI summary
The present invention provides a semiconductor circuit board in which a conductor portion is provided on an insulating substrate, wherein a surface roughness of a semiconductor element-mounting section of the conductor portion is 0.3 μm or lower in arithmetic average roughness Ra, 2.5 μm or lower in ten-point average roughness Rzjis, 2.0 μm or smaller in maximum height Rz, and 0.5 μm or lower in arithmetic average waviness Wa. Further, assuming that a thickness of the insulating substrate is t1 and a thickness of the conductor portion is t2, the thickness of t1 and t2 satisfy a relation: 0.1≦t2/t1≦50. Due to above structure, even if an amount of heat generation of the semiconductor element is increased, there can be provided a semiconductor circuit board and a semiconductor device having excellent TCT characteristics.