Semiconductor Integrated Circuit Devices With Buried Impurity Layers

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Solution Overview

Problem

In semiconductor integrated circuit devices, high-voltage transistors can cause malfunctions in low-voltage transistors due to electrical interference, leading to reliability issues.

Innovation Solution

The implementation of a semiconductor integrated circuit device with a substrate having defined high-voltage and low-voltage regions, including buried impurity layers and wells, where the low-voltage region is electrically isolated from the high-voltage region through an intermediate voltage, preventing interference and ensuring stable operation of low-voltage transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If high-voltage transistors are integrated with low-voltage transistors on the same substrate, then device functionality and integration are improved, but electrical interference causes malfunctions and reduces reliability

Engineering Contradiction:
Improvedevice functionalityVSAvoidoperational reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The substrate is divided into distinct high-voltage device regions and low-voltage device regions, with each region containing transistors operating at appropriate voltage levels. This spatial segmentation prevents electrical interference while maintaining integration on a single substrate, resolving the contradiction between functionality and reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Buried impurity layers are introduced as intermediary structures between high-voltage and low-voltage regions. These impurity layers create electrical isolation barriers that prevent harmful voltage interference from propagating between regions, enabling both high-voltage and low-voltage transistors to coexist reliably on the same substrate.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If high-voltage transistors are placed near low-voltage transistors, then integration density is improved, but voltage interference causes malfunctions

Engineering Contradiction:
Improveintegration densityVSAvoidvoltage interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

Different regions of the substrate are assigned different electrical characteristics through selective doping with buried impurity layers. High-voltage regions have impurity concentrations suitable for high-voltage operation, while low-voltage regions have appropriate doping levels, creating locally optimized environments that prevent interference while maintaining high integration density.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Buried impurity layers serve as intermediary isolation structures that can be positioned between adjacent high-voltage and low-voltage transistor regions. These layers create electrical barriers that block voltage interference while allowing the transistors to remain in close proximity, thus maintaining high integration density without sacrificing operational reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7960785B2Semiconductor integrated circuit devices
Publication Date: 2011.06.14 SAMSUNG ELECTRONICS CO LTD
  • US7960785B2 patent drawing
  • US7960785B2 patent drawing
  • US7960785B2 patent drawing

AI summary

A semiconductor integrated circuit device may include: a substrate that includes a high-voltage device region and a low-voltage device region defined on the substrate; a first buried impurity layer formed in at least a portion of the high-voltage device region and coupled to a first voltage; a second buried impurity layer formed in at least a portion of the low-voltage device region and coupled to a second voltage less than the first voltage; and a well formed on the second buried impurity layer in the low-voltage device region and coupled to a third voltage less than the second voltage.