Semiconductor Device Circumferential Region Depletion Layer Expansion
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Solution Overview
Problem
The existing semiconductor device design slows down the extension of the depletion layer from the cell region to the circumferential region, resulting in inadequate high voltage resistance due to gradual extension through multiple bottom-surface surrounding regions.
Innovation Solution
The semiconductor device incorporates a configuration with first and second trenches in the circumferential region, a fourth region spanning their bottom surfaces, and a low area density region between them, allowing the depletion layer to expand quickly and evenly across the circumferential region, thereby enhancing high voltage resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple bottom-surface surrounding regions are provided in the circumferential region, then the depletion layer extension is controlled gradually, but the voltage resistance is insufficient due to slow extension speed
Solution Approach 1:
The circumferential region is divided into multiple bottom-surface surrounding regions (first, second, third regions) with different impurity concentrations. This segmentation allows the depletion layer to extend through regions of varying doping levels, enabling controlled gradual extension while maintaining adequate voltage resistance. The first region has higher impurity concentration to slow initial extension, while subsequent regions have lower concentrations to facilitate progression.
Solution Approach 2:
Different regions within the circumferential region are assigned different impurity concentrations tailored to their specific positions and functions. The first bottom-surface surrounding region has a higher impurity concentration than the second and third regions, creating local variations in electrical properties that control the depletion layer extension characteristics at each location.
2Stability of the object's composition
If the depletion layer extends gradually through multiple bottom-surface surrounding regions, then the extension is controlled, but the potential distribution becomes uneven and electric field concentration occurs
Solution Approach 1:
The impurity concentration parameter is systematically varied across different bottom-surface surrounding regions. The first region has a higher impurity concentration (1×10^18 to 1×10^19 atoms/cm³) while the second and third regions have lower concentrations (1×10^17 to 1×10^18 atoms/cm³). This parameter change creates optimal conditions for uniform potential distribution and prevents electric field concentration at region boundaries.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables rapid expansion of the depletion layer across the circumferential region, achieving higher voltage resistance by ensuring even potential distribution and suppressing electric field concentration at the trench ends.
Implementation Method 1
When the insulated gate type switching element turns off, a depleted layer extends from the element region to the circumferential region
Data Source
AI summary
Higher voltage resistance is accomplished by expanding a depletion layer more quickly within a circumferential region. A semiconductor device includes an element region, in which an insulated gate type switching element is provided, and the circumferential region. A first trench and a second trench spaced apart from the first trench are provided in the front surface in the circumferential region. Insulating films are provided in the first trench and the second trench. A fourth region of the second conductivity type is provided so as to extend from a bottom surface of the first trench to a bottom surface of the second trench. A fifth region of the first conductivity type continuous from the third region is provided under the fourth region.