Semiconductor Cleaving with Thermal-Mechanical Stress Control
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Solution Overview
Problem
Conventional methods for cleaving silicon on insulator materials (SOI) wafers result in poor thickness uniformity and high temperatures that can damage the semiconductor wafer, taking a long time to complete the process.
Innovation Solution
A method involving a vacuum chuck and vacuum chamber to suspend and stress the semiconductor structure, combined with heating to cleave along a designated plane, using thermal and mechanical stress to improve uniformity and reduce cleave temperatures and time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional cleaving methods are used, then the cleaving process can be completed, but the thickness uniformity of the top layer is poor
Solution Approach 1:
The patent changes the physical parameters of the cleaving process by applying controlled thermal stress (temperature changes) and mechanical stress (vacuum pressure) to the semiconductor wafer. This combination of parameter changes enables precise control over the cleaving process, achieving both high thickness uniformity and reliable cleave quality that conventional single-method approaches cannot achieve
2Productivity
If conventional cleaving methods are used, then the cleaving process can be completed, but high temperatures are required which can damage the semiconductor wafer
Solution Approach 1:
The patent merges thermal stress application with mechanical stress application in a single integrated process. By combining these two stress mechanisms, the system achieves effective cleaving at lower temperatures than conventional thermal-only methods, preventing wafer damage while maintaining productivity
Solution Approach 2:
The patent introduces a controlled thermal-mechanical stress field as an intermediary mechanism between the vacuum chuck and the wafer material. This intermediary stress field enables cleaving to propagate along the desired plane without requiring extreme temperatures that would directly damage the wafer
3Productivity
If conventional cleaving methods are used, then the cleaving process can be completed, but it takes a relatively long time
Solution Approach 1:
The patent applies continuous thermal and mechanical stress to the wafer during the cleaving process, eliminating idle time between process steps. The vacuum chuck maintains continuous contact and stress application throughout, enabling faster cleave propagation while the controlled stress distribution ensures uniform thickness results
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Achieves better thickness uniformity, reduces wafer damage, and shortens processing time while maintaining low temperatures, resulting in higher throughput and improved surface quality.
Implementation Method 1
A vacuum is applied in the vacuum chamber to grasp the semiconductor structure and suspend the semiconductor structure in an inlet chamber
Implementation Method 2
The semiconductor structure is heated while applying the vacuum in the vacuum chamber to cleave the semiconductor structure along a cleave plane
Data Source
AI summary
Cleaving systems and methods for cleaving a semiconductor structure. The systems and methods may involve a combination of thermally and mechanically induced stress. The cleave system may include a vacuum chuck which deflects the semiconductor structure and a heater which heats the structure while the vacuum is applied. The combination of thermal and mechanical stress causes the structure to cleave along a cleave plane.