Semiconductor Clock Control for EMI Noise Suppression

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Solution Overview

Problem

NAND-type flash memory devices experience noise degradation and reliability issues due to electro-magnetic interference (EMI) caused by the overlap of external and internal clock signals during continuous reading operations, leading to potential misoperations and performance degradation.

Innovation Solution

A semiconductor device with a clock control part that detects the overlap period between external and internal clock signals and adjusts the internal clock signal's frequency or phase to prevent noise accumulation, using detection circuits to synchronize the clock generation with the external clock signal, thereby reducing EMI noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If continuous reading operation is performed using external clock signal, then reading speed is improved, but EMI noise is generated due to overlap with internal clock signal

Engineering Contradiction:
Improvereading speedVSAvoidEMI noise
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The detection circuit detects the overlap period between external and internal clock signals in advance, and the control circuit pre-adjusts the internal clock signal timing to avoid EMI noise generation during continuous reading operations

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The control circuit adjusts the phase or frequency of the internal clock signal based on the detected overlap period, changing the timing parameter of the internal clock to eliminate overlap with the external clock signal during continuous reading

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If internal clock signal timing is adjusted to avoid overlap, then EMI noise is suppressed, but clock synchronization complexity increases

Engineering Contradiction:
ImproveEMI noiseVSAvoidclock control complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The detection circuit continuously monitors the overlap period between clock signals and provides feedback to the control circuit, which automatically adjusts the internal clock timing based on this feedback to maintain optimal synchronization without manual intervention

Inventive Principle:
Principle #23Feedback

3Reliability

If detection circuit is added to monitor clock overlap, then EMI noise can be prevented, but device complexity increases

Engineering Contradiction:
Improvenoise suppressionVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The detection circuit and control circuit are integrated into the existing clock generation and control infrastructure of the semiconductor device, sharing common components and signal paths to minimize additional complexity while achieving EMI noise suppression

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11075174B2Semiconductor device
Publication Date: 2021.07.27 WINBOND ELECTRONICS CORP
  • US11075174B2 patent drawing
  • US11075174B2 patent drawing
  • US11075174B2 patent drawing

AI summary

A semiconductor device capable of suppressing generation of noise caused by EMI is provided. The flash memory includes a memory cell array, a clock generator (200), a readout part, an input/output circuit, an overlap detecting part (330) and a clock control part. The clock generator generates an internal clock signal. The readout part reads data from a selected memory cell of the memory cell array using the internal clock signal. The input/output circuit outputs the read data using an external clock signal supplied from outside. The overlap detecting unit detects a period during which a rising edge of the internal clock signal overlaps a rising edge of external clock signal. The clock control part controls a timing of the internal clock signal in response to the detected overlap period.