Semiconductor Circuit Clock Control for IR Drop Prevention
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Solution Overview
Problem
Existing semiconductor integrated circuits face malfunctions due to IR drops when attempting to save and recover internal state data using scan chains, as simultaneous clock signal application to all flip-flops leads to rapid current flow and voltage drops.
Innovation Solution
A semiconductor integrated circuit and control method that utilize a backup control circuit to supply distinct clock signals for normal, test, and save/recover modes, employing a frequency-divided clock signal to prevent IR drops during data saving and recovery operations, allowing for independent operation of scan chains and reducing the risk of malfunctions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a clock signal is supplied to entire flip-flops to operate simultaneously for saving internal state data, then the data saving operation can be completed, but rapid current flow causes IR drop and voltage decrease leading to malfunctions
Solution Approach 1:
The patent divides the scan chain into multiple sub-scan chains (first sub-scan chain and second sub-scan chain). By segmenting the flip-flops into different groups that operate independently, the simultaneous switching of all flip-flops is avoided, thereby preventing IR drop while still enabling complete data saving functionality.
2Adaptability or versatility
If the scan chain is used to save and recover internal state data, then standby and resume functions can be realized, but simultaneous operation of all flip-flops causes rapid current flow and voltage decrease
Solution Approach 1:
The scan chain is segmented into multiple sub-scan chains that can be activated independently. This allows the standby and resume functions to be implemented while avoiding simultaneous operation of all flip-flops, thus eliminating IR drop and voltage decrease issues.
Solution Approach 2:
The patent dynamically controls which sub-scan chains are activated based on the operation mode. During save and recover operations, only the necessary sub-scan chains are activated, allowing flexible and adaptive operation that prevents harmful current flow while maintaining functional versatility.
3Ease of operation
If all flip-flops are controlled to operate simultaneously, then the scan chain function can be achieved, but unnecessary operations occur in normal operation mode
Solution Approach 1:
By dividing the scan chain into separate sub-scan chains, the patent enables selective activation of only the necessary segments during normal operation, preventing unnecessary operations in flip-flops that are not involved in the current task, thus reducing energy consumption.
Solution Approach 2:
The patent implements partial action by activating only the specific sub-scan chains needed for the current operation rather than all flip-flops. This reduces energy waste while maintaining complete functionality when needed.
Data Source
AI summary
A semiconductor integrated circuit includes a target circuit configured to operate in a normal mode, to form a scan chain to serially transfer a test data through the scan chain, in a scan path test mode, and to form a plurality of sub scan chains to save an internal node data in a memory in a save mode; and a backup control circuit configured to supply to the target circuit, a system clock signal in the normal mode, a test clock signal in the scan path test mode, and a save/recover clock signal in the save mode, and to control the target circuit and the memory such operations in the normal mode, the scan path test mode, and the save mode are performed. The test clock signal is slower than the system clock signal, and the save/recover clock signal is slower than the system clock signal and faster than the test clock signal.