Semiconductor Device Clock Shifter for High-Frequency AC Parameter Testing
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Solution Overview
Problem
Current semiconductor device testing methods using low-frequency probe equipment are inefficient for screening high-frequency semiconductor device specifications, as they require long delays between command signals, limiting the ability to test characteristics like tRCD and tRP effectively.
Innovation Solution
A semiconductor device with a clock shifter and command selection block that shifts and selects active and precharge control signals based on test signals, allowing for timely activation of bank operations and precharge states, enabling efficient testing of core AC parameters with low-frequency equipment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If low-frequency probe equipment is used for testing, then the testing equipment is simpler and more accessible, but the testing efficiency and accuracy for high-frequency specifications deteriorates due to long delays between command signals
Solution Approach 1:
A delay control block is introduced as an intermediary component between the low-frequency probe equipment and the semiconductor device under test. This block receives a delay control signal and generates delayed command signals (ACTP2D_TM, PCGPD_TM) that simulate high-frequency operation timing. The delay control block acts as a mediator that translates low-frequency test equipment capabilities into effective high-frequency specification testing by precisely controlling the timing intervals between commands.
2Speed
If long delays are inserted between active and precharge commands, then low-frequency test equipment can operate, but the ability to screen high-frequency specifications like tRCD and tRP deteriorates
Solution Approach 1:
The delay control block dynamically adjusts the time interval parameter between command signals based on the delay control signal. By varying the delay period, the system can simulate different operating frequencies and timing parameters (tRCD, tRP) without changing the physical test equipment frequency. This parameter adjustment allows low-frequency equipment to effectively test high-frequency specifications by creating the appropriate temporal relationships between commands.
3Measurement precision
If high-frequency command signals are used, then specification screening accuracy improves, but the requirement for precise timing control and next command input timing increases
Solution Approach 1:
The delay control block automatically generates the precisely timed command signals based on received delay control signals, eliminating the need for manual timing adjustment. The block self-manages the complex timing relationships by internally generating delayed versions of commands (ACTP2D_TM, PCGPD_TM) with correct intervals, thereby maintaining measurement precision while reducing operational complexity for the tester.
Data Source
AI summary
A semiconductor device includes a clock shifter configured to shift an active control signal by a predetermined number of clocks and output a shift signal according to a test signal; a command selection block configured to select any one of the active control signal and the shift signal according to the test signal, and output an active command signal; an active control block configured to control an active state of a bank active signal according to the active command signal; and an address latch block configured to latch an internal address according to the active command signal and the active control signal, and output a row address to a core region.