Semiconductor Column Buffer Layer for Lower Contact Resistance

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Solution Overview

Problem

In semiconductor devices, the contact resistance between semiconductor columns and bottom contacts is high due to direct connection through the substrate, leading to increased band offset differences at the interface, which affects the 'on' and 'off' states of transistors.

Innovation Solution

A buffer layer is formed over a portion of the substrate, with semiconductor columns connected to the buffer layer, reducing contact resistance and band offset differences by establishing a connection through the buffer layer instead of the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If semiconductor columns are directly connected to bottom contacts through the substrate, then the device structure is simple, but the contact resistance is high and band offset differences increase

Engineering Contradiction:
Improvecontact resistanceVSAvoiddevice structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A buffer layer is introduced as an intermediary between the semiconductor columns and the substrate. This buffer layer has a composition gradient that transitions from the substrate material at the interface to the semiconductor column material at the top, serving as a mediator that reduces band offset differences and contact resistance while maintaining structural integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer layer employs a composition gradient where the material composition changes continuously from the substrate interface to the semiconductor column interface. This parameter change in material composition progressively reduces the band offset difference, enabling lower contact resistance without requiring a completely different device architecture.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a buffer layer is introduced to reduce contact resistance and band offset differences, then transistor performance improves, but the device structure becomes more complex

Engineering Contradiction:
Improvetransistor performanceVSAvoidbuffer layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer layer uses a composition gradient that changes material parameters continuously from the substrate interface to the semiconductor column interface. This gradual parameter change reduces band offset differences step-by-step, improving transistor performance while keeping the structural addition relatively simple compared to multiple discrete layers.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12074220B2Formation of semiconductor arrangement comprising semiconductor column
Publication Date: 2024.08.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12074220B2 patent drawing
  • US12074220B2 patent drawing
  • US12074220B2 patent drawing

AI summary

A semiconductor arrangement and methods of formation are provided. A semiconductor arrangement includes a semiconductor column on a buffer layer over a substrate. The buffer layer comprises a conductive material. Both a first end of the semiconductor column and a bottom contact are connected to a buffer layer such that the first end of the semiconductor column and the bottom contact are connected to one another through the buffer layer, which reduces a contact resistance between the semiconductor column and the bottom contact. A second end of the semiconductor column is connected to a top contact. In some embodiments, the first end of the semiconductor column corresponds to a source or drain of a transistor and the second end corresponds to the drain or source of the transistor.