Semiconductor Column Contact Structure for Low-Resistance GAA Switching
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Solution Overview
Problem
Existing semiconductor devices with Gate-All-Around (GAA) structures face challenges in reducing contact resistance at the interface between the semiconductor column portions and the metal electrodes, leading to performance deterioration.
Innovation Solution
The semiconductor device incorporates a plurality of column portions with source and drain regions, coupled with semiconductor and metal layers, and a gate electrode surrounding the channel formation region, which helps in reducing contact resistance by increasing the contact area and using n-type semiconductor layers to enhance electrical conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the semiconductor column portion is formed in the top-down manner with a conductive layer masked to perform etching, then the manufacturing process is simplified, but the area of ohmic contact between the semiconductor column portion and the conductive layer is reduced, leading to increased contact resistance
Solution Approach 1:
The patent transitions from a planar contact interface to a three-dimensional structure by forming the semiconductor column portion vertically. The conductive layer is positioned to surround the semiconductor column portion in multiple directions (top, bottom, and sidewalls), effectively increasing the contact area from a two-dimensional interface to a multi-dimensional interface, thereby reducing contact resistance while maintaining manufacturing simplicity.
Solution Approach 2:
The conductive layer is nested around the semiconductor column portion, with the conductive layer forming a surrounding structure that encloses the semiconductor column. This nested configuration maximizes the contact area between the conductive layer and semiconductor column portion, allowing current to flow through multiple contact points rather than a single interface, thus reducing overall contact resistance.
2Length of moving object
If the semiconductor column portion diameter is reduced to achieve miniaturization, then device size is reduced, but the contact area between the electrode and semiconductor column portion is reduced, leading to increased contact resistance
Solution Approach 1:
As the semiconductor column portion diameter is reduced for miniaturization, the patent compensates by extending the conductive layer in the vertical dimension to surround the smaller column portion. The conductive layer makes contact at the top, bottom, and along the sidewalls of the column portion, effectively compensating for the reduced horizontal contact area through increased vertical contact surfaces.
Solution Approach 2:
The contact interface is segmented into multiple discrete contact regions: top contact, bottom contact, and sidewall contacts. By dividing the single contact interface into multiple segments distributed around the semiconductor column portion, the total contact area is maintained even as the column portion diameter is reduced, thereby preventing contact resistance from increasing.
3Ease of operation
If the entire circumferential direction is surrounded by a gate electrode (GAA structure), then electric-current controllability is improved for rapid switching, but the complexity of the device structure increases
Solution Approach 1:
The patent merges multiple gate electrode segments into a unified Gate-All-Around structure that completely surrounds the semiconductor column portion. By combining the top gate, bottom gate, and sidewall gate into a single integrated structure, the device achieves full circumferential control of the channel while minimizing the number of separate components, thus improving switching speed without proportionally increasing structural complexity.
Solution Approach 2:
The gate electrode structure employs asymmetric positioning relative to the semiconductor column portion, with different gate segments located at different angular positions around the column. This asymmetric arrangement allows the gate electrode to achieve complete circumferential control while optimizing the spatial distribution of electrical fields, improving switching performance without requiring symmetric complexity in all directions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the increase in contact resistance, improves the performance of the semiconductor device by reducing on-resistance and heat generation, and enables high switching frequency and power density.
Implementation Method 1
a gate electrode provided, via an insulating layer, at a side wall of the channel formation region of each of the plurality of column portions and configured to control a current between the source region and the drain region
Implementation Method 2
using n-type semiconductor layers to enhance electrical conductivity
Data Source
AI summary
A semiconductor device includes a plurality of column portions made of a semiconductor. The plurality of column portions each include a source region, a drain region, and a channel formation region including a channel formed between the source region and the drain region. The semiconductor device further includes: a gate electrode provided at a side wall of the channel formation region with an insulating layer being interposed between the gate electrode and the side wall; a first semiconductor layer coupled to either one of the source region and the drain region of each of the plurality of column portions; and a first metal layer coupled to the first semiconductor layer.