Semiconductor Command Generator for Nonvolatile Memory Control

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Solution Overview

Problem

Existing semiconductor systems face challenges in efficiently controlling program and read operations in nonvolatile memory devices, particularly in managing voltage levels and command signals for programming and reading data in EEPROM and flash memory cells.

Innovation Solution

A semiconductor device with an internal command generator and bias generator that generates specific internal command signals in synchronization with external program signals to control read and program operations, including a read bias signal for managing output voltage levels, enabling precise control over memory cell programming and data retrieval.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple internal command signals are generated sequentially in synchronization with external program signal pulses, then the control precision for read and program operations is improved, but the device complexity increases due to multiple signal generation and coordination mechanisms

Engineering Contradiction:
Improvecontrol precisionVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The internal command generator divides the control process into multiple sequential internal command signals (first, second, third, and fourth internal command signals), each corresponding to specific operation phases (read or program). This segmentation allows precise control of different operation stages while maintaining clear signal separation and coordination.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The internal command signals are generated in advance in synchronization with external program signal pulses before the actual read or program operations execute. This preliminary generation of control signals ensures that all necessary command sequences are prepared and coordinated before operations begin, improving control precision without requiring complex real-time coordination.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a read bias signal is generated to control output voltage signal levels, then the reliability of data read operations is improved, but the device complexity increases due to additional bias generation circuitry

Engineering Contradiction:
ImprovereliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bias generator produces a read bias signal that controls output voltage signal levels applied to internal circuits during read operations. This single bias signal serves multiple functions: controlling voltage levels for reliable data retrieval, coordinating with internal command signals, and managing power distribution to internal circuits, thereby improving reliability without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The read bias signal acts as an intermediary between the bias generator and the internal circuits, mediating voltage level control during read operations. This intermediary signal ensures proper voltage levels are applied to internal circuits for reliable data retrieval, while the bias generator itself remains a relatively simple circuit component.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If synchronized command signal generation is implemented with external program signals, then the productivity of memory operations is improved, but the device complexity increases due to synchronization mechanisms

Engineering Contradiction:
ImproveproductivityVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The internal command generator produces sequences of internal command signals that are periodically synchronized with external program signal pulses. Each pulse triggers a corresponding sequence of internal commands, creating a rhythmic, periodic operation pattern that improves productivity through efficient batching and timing of read and program operations.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The synchronization mechanism uses the external program signal pulses as a reference feedback input to coordinate the generation of internal command signals. This feedback-based synchronization ensures that internal commands are generated at the correct times relative to external operations, improving productivity through coordinated operation without requiring complex bidirectional communication.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution allows for synchronized and efficient control of read and program operations, ensuring accurate data storage and retrieval by managing voltage levels and command signals, thereby enhancing the performance of semiconductor systems.

Implementation Method 1

generate first to fourth internal command signals sequentially enabled in synchronization with pulses of an external program signal

Methodology Applied
Scientific EffectSynchronization:

Implementation Method 2

generate a read bias signal for controlling a level of an output voltage signal, which is applied to an internal circuit

Methodology Applied
Scientific EffectVoltage control:

Implementation Method 3

The first internal command signal controls a read operation for reading out data stored in memory cells

Methodology Applied
Scientific EffectData retrieval:

Implementation Method 4

the second and third internal command signals control a program operation for programming the memory cells

Methodology Applied
Scientific EffectData programming:

Data Source

PatentUS9001598B2Semiconductor devices and semiconductor systems including the same
Publication Date: 2015.04.07 SK HYNIX INC
  • US9001598B2 patent drawing
  • US9001598B2 patent drawing
  • US9001598B2 patent drawing

AI summary

A semiconductor device including an internal command generator and a bias generator is provided. The internal command generator generates first to fourth internal command signals sequentially enabled in synchronization with pulses of an external program signal. The first internal command signal controls a read operation for reading out data stored in memory cells, and the second and third internal command signals control a program operation for programming the memory cells. The bias generator generates a read bias signal for controlling a level of an output voltage signal, which is applied to an internal circuit, in response to the first and fourth internal command signals.