Semiconductor Device Common Source Terminal and Flush Layout

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Solution Overview

Problem

Conventional semiconductor devices requiring external connection of source terminals for bidirectional switching pose challenges in miniaturization and internal terminal arrangement.

Innovation Solution

A semiconductor device design featuring a common source terminal that electrically connects the source electrodes of two MOSFETs internally, eliminating the need for external connections and allowing for a more compact layout with flush terminal surfaces within a sealing resin.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If source terminals are connected externally for bidirectional switching, then the device can function as a bidirectional switch, but the device size increases and miniaturization is hindered

Engineering Contradiction:
Improvebidirectional switching functionVSAvoiddevice size
Core Design Contradiction:
Adaptability or versatilityVSVolume of moving object

Solution Approach 1:

The patent merges the source terminals of the first and second MOSFETs into a single common source terminal structure. The source electrode of the first MOSFET and the source electrode of the second MOSFET are both connected to the same common source terminal, eliminating the need for separate external connections. This integration reduces the number of external terminals required and enables device miniaturization while maintaining bidirectional switching functionality.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of operation

If lead terminals project from the outer surface of the sealing resin, then external connections are simplified, but the device size increases and miniaturization is prevented

Engineering Contradiction:
Improveexternal connection simplicityVSAvoiddevice size
Core Design Contradiction:
Ease of operationVSVolume of moving object

Solution Approach 1:

The patent transitions the terminal arrangement from a three-dimensional protruding structure to a two-dimensional planar structure. Instead of lead terminals projecting outward from the sealing resin surface in the vertical dimension, all terminals are arranged flush with the outer surface of the sealing resin in the same plane. This dimensional change eliminates the need for additional vertical space, enables miniaturization, while maintaining ease of external connections through the flush arrangement.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If separate source terminals are used for each MOSFET, then each terminal can be independently connected, but the internal terminal arrangement becomes complex and device size increases

Engineering Contradiction:
Improveterminal connection flexibilityVSAvoidinternal terminal arrangement
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines multiple source terminals into a single common source terminal that serves both MOSFETs. The common source terminal structure integrates the source electrode connections of the first and second MOSFETs, simplifying the internal terminal arrangement from multiple separate terminals to a unified structure. This reduction in terminal count decreases device complexity while maintaining the flexibility needed for bidirectional switching operations.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10770379B2Semiconductor device
Publication Date: 2020.09.08 ROHM CO LTD
  • US10770379B2 patent drawing
  • US10770379B2 patent drawing
  • US10770379B2 patent drawing

AI summary

A semiconductor device 1 includes a first drain terminal 4, connected to a drain electrode of a first semiconductor chip, a first gate terminal 5, connected to a gate electrode of the first semiconductor chip, a second drain terminal 6, connected to a drain electrode of a second semiconductor chip, a second gate terminal 7, connected to a gate electrode of the second semiconductor chip, a common source terminal 8, connected to a source electrode of the first semiconductor chip and a source electrode of the second semiconductor chip, and a sealing resin 9, sealing the respective semiconductor chips and the respective terminals. The respective terminals have exposed surfaces (lower surfaces) 43, 53, 63, 73, and 83 substantially flush with an outer surface (lower surface) 9b of the sealing resin 9 and exposed from the outer surface 9b.