Semiconductor Composite Device Multi-Layer Package Board

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Solution Overview

Problem

Existing semiconductor devices with embedded inductors and capacitors face challenges in size reduction while maintaining desired characteristics, as the area reduction of the package board compromises the inductance and capacitance of these components.

Innovation Solution

A semiconductor composite device is designed with a package board featuring separate layers for the inductor and capacitor, connected through through holes, allowing for increased area and improved electrical connections, which enhances inductance and capacitance while reducing the device's size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the area of the mounting face of the package board is reduced to reduce the size of the semiconductor device, then the size of the semiconductor device is reduced, but the inductance of the inductor and the capacitance of the capacitor formed in the package board cannot be secured sufficiently

Engineering Contradiction:
Improvesize of semiconductor deviceVSAvoidinductance and capacitance characteristics
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent applies multi-layer construction to the package board, separating the inductor and capacitor into different layers (first layer and second layer). This vertical dimensionality change allows both components to coexist without occupying the same planar area, thereby maintaining sufficient inductance and capacitance values while reducing the overall device footprint. The through holes provide vertical electrical connections between layers, enabling compact integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If the inductor and the capacitor are laid out and embedded in the same layer of the package board, then the device complexity is reduced, but the area of the mounting face cannot be sufficiently utilized to secure desired inductance and capacitance

Engineering Contradiction:
Improvelayer structure complexityVSAvoidmounting face area utilization
Core Design Contradiction:
Device complexityVSArea of stationary object

Solution Approach 1:

The patent transitions from single-layer to multi-layer construction, placing the inductor in the first layer and the capacitor in the second layer. This vertical separation allows both components to utilize the full mounting face area of their respective layers without spatial conflict, thereby securing desired inductance and capacitance values while maintaining reasonable structural complexity through systematic layer design.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If separate layers are used for inductor and capacitor, then the inductance and capacitance can be secured, but the device complexity increases

Engineering Contradiction:
Improveinductance and capacitance characteristicsVSAvoidlayer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the package board into distinct functional layers: the first layer contains the inductor, the second layer contains the capacitor, and through holes provide inter-layer connections. This segmentation allows each component to be optimized independently for its electrical characteristics while the overall structure remains manageable through modular layer design, balancing performance requirements with manufacturing complexity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11552020B2Semiconductor composite device and package board used therein
Publication Date: 2023.01.10 MURATA MFG CO LTD
  • US11552020B2 patent drawing
  • US11552020B2 patent drawing
  • US11552020B2 patent drawing

AI summary

A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole.