Semiconductor Conductive Line Isolation via Selective Etching

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Solution Overview

Problem

In highly integrated semiconductor devices, the decreasing separation distance between conductive lines makes it difficult to form holes or contact plugs effectively, as existing methods struggle to accurately create and fill isolated holes with minimal voids.

Innovation Solution

A method involving the formation of a first insulation layer, patterning to create isolated holes, and subsequent filling with a second insulation layer having etching selectivity, along with a liner layer to compensate for vertical profiles, allowing for the formation of second isolated holes and contact plugs without voids.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the separation distance between conductive lines is reduced to increase integration degree, then the integration degree is improved, but it becomes difficult to form holes or contact plugs between the conductive lines

Engineering Contradiction:
Improveintegration degreeVSAvoidease of forming holes or contact plugs
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent divides the hole formation process into multiple stages: first forming initial holes through the insulation layer, then selectively removing insulation material between conductive lines to create isolated holes, and finally forming contact plugs. This segmentation allows each step to be optimized independently, enabling hole formation even at reduced separation distances between conductive lines

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by first forming the insulation layer and initial holes before attempting to create the final contact plugs. The liner layer is also formed in advance to prepare the surface for subsequent material deposition, ensuring that all necessary structures are ready before the critical hole formation step

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If conventional methods are used to form isolated holes, then the process is simple, but voids are generated in the filled holes

Engineering Contradiction:
Improveprocess simplicityVSAvoidvoid formation in holes
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent introduces a liner layer as an intermediary between the insulation layer and the material to be deposited in the holes. This liner layer serves as a mediator that improves adhesion and provides a controlled surface for material deposition, preventing void formation while maintaining process feasibility

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the physical and chemical parameters of the hole surface by forming a liner layer with specific material properties. This modifies the surface energy, adhesion characteristics, and etching behavior, enabling complete filling of holes without voids while maintaining a manageable manufacturing process

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the efficient formation of second isolated holes and contact plugs between conductive lines in highly integrated semiconductor devices, ensuring precise separation distances and minimizing voids, thereby facilitating better connectivity and device performance.

Implementation Method 1

forming a liner layer in the first isolated holes, in which the liner layer compensates for a vertical profile of the first isolated holes

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

forming a plurality of second isolated holes between the conductive lines by removing the first insulation layer using the etching selectivity between the second insulation layer and the first insulation layer

Methodology Applied
Scientific EffectSelective Etching:

Data Source

PatentUS8946077B2Method of manufacturing a semiconductor device
Publication Date: 2015.02.03 SAMSUNG ELECTRONICS CO LTD
  • US8946077B2 patent drawing
  • US8946077B2 patent drawing
  • US8946077B2 patent drawing

AI summary

A method of manufacturing a semiconductor device includes forming a plurality of conductive lines separated from one another in a first direction via a slender hole and extending in a second direction perpendicular to the first direction, forming a first insulation layer filling the slender hole between the plurality of conductive lines, forming a plurality of first isolated holes separated from one another between the plurality of conductive lines in the first direction and the second direction by patterning the first insulation layer, forming a liner layer in the first isolated holes, filling a second insulation layer having an etching selectivity with respect to the first insulation layer, in the first isolated holes on the liner layer and forming a plurality of second isolated holes between the conductive lines by removing the first insulation layer using the etching selectivity between the second insulation layer and the first insulation layer.