Semiconductor Conductive Pillar Formation for Probe Testing Reliability
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Solution Overview
Problem
Semiconductor devices face issues with premature failure due to damage from probe testing, such as off-centered probe marks and scrub marks, which can lead to corrosion and poor electrical connections, and the need for additional processing time and area for separate test pads.
Innovation Solution
A method of forming semiconductor devices involves testing and removing damaged conductive pads, forming conductive pillars over the underlying material, and creating electrical connections to external circuitry, resulting in a more compact design with improved reliability and reduced risk of premature failure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If probe testing is performed on conductive pads, then electrical connections can be tested, but off-centered probe marks and scrub marks are formed causing corrosion and premature failure
Solution Approach 1:
The patent extracts the testing function from the original conductive pad by forming a separate test pad structure. The test pad is specifically designed to receive probe contacts during wafer probing, while the original conductive pad remains undamaged for its primary electrical connection function. This separation removes the harmful probe mark effects from the critical conductive pad.
Solution Approach 2:
The patent segments the testing function from the electrical connection function by creating distinct test pad and conductive pad structures. The test pad is formed as a separate entity that can be selectively probed without affecting the integrity of the conductive pad that connects to the semiconductor device circuitry.
2Reliability
If separate test pads are formed for probe testing, then probe mark damage to functional pads is avoided, but additional processing time and area are required
Solution Approach 1:
The patent merges the test pad formation process with the existing conductive pad fabrication sequence. The test pad is formed using the same deposition and patterning steps as the conductive pad, integrating the additional functionality into the existing process flow without requiring separate processing stages.
Solution Approach 2:
The test pad structure serves multiple functions: it provides a dedicated target for probe testing, prevents damage to functional pads, and can be used for both electrical testing and process monitoring. This multi-functionality justifies the additional structure by providing multiple benefits from a single added element.
3Manufacturing precision
If conductive pads are masked during testing to prevent off-centered probe marks, then inspection failures are avoided, but additional processing steps and cost are added
Solution Approach 1:
The patent extracts the testing function to a dedicated test pad that is specifically designed to receive probe contacts. This eliminates the need for masking procedures on the original conductive pad, as the test pad is intentionally designed to be the target of probe contact, removing the complexity of masking and unmasking steps.
4Reliability
If probe pins contact conductive pads for testing, then electrical connections can be verified, but scrub marks are formed that accelerate corrosion
Solution Approach 1:
The patent extracts the testing function from the conductive pad by forming a separate test pad structure. The probe pins contact the test pad for electrical verification, while the conductive pad that connects to the semiconductor device circuitry remains free from probe-induced scrub marks and corrosion acceleration.
Data Source
AI summary
A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described.