Semiconductor Conductive Plug Fingers Reduce On-Resistance
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Solution Overview
Problem
Current semiconductor structures, such as LDMOS and EDMOS, face limitations in reducing on-resistance (Ron) while maintaining or improving breakdown voltage (BVD), resulting in a suboptimal Ron to BVD ratio, which is crucial for low power consumption in high-voltage PMIC devices.
Innovation Solution
A semiconductor structure featuring a conductive plug with at least two fingers penetrating into the isolation, which electrically connects to the gate electrode and is spaced apart, effectively reducing on-resistance and increasing breakdown voltage, thereby enhancing the Ron to BVD ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional LDMOS or EDMOS structures are used, then the device can operate at high voltage, but the on-resistance remains high resulting in high power consumption
Solution Approach 1:
The conductive plug is divided into multiple fingers (at least two) that penetrate the isolation layer. This segmentation creates multiple parallel conduction paths from the gate electrode through the isolation to the deep well, effectively reducing the total on-resistance while maintaining the high-voltage blocking capability of the isolation structure.
Solution Approach 2:
The conductive plug extends vertically through the isolation layer, adding a third-dimensional conduction path. The fingers are spaced apart laterally while connected vertically, creating a three-dimensional conductive structure that reduces resistance without compromising the horizontal isolation function.
2Use of energy by moving object
If the on-resistance is reduced to lower power consumption, then power efficiency improves, but the breakdown voltage decreases
Solution Approach 1:
The isolation structure is segmented by multiple spaced-apart fingers instead of a single continuous plug. This segmentation maintains adequate spacing between conductive elements, preventing premature breakdown while providing multiple conduction paths to reduce on-resistance. The spacing between fingers preserves the dielectric strength of the isolation layer.
Solution Approach 2:
The conductive fingers are localized at specific positions within the isolation layer, creating concentrated conduction paths where needed while maintaining isolation in other regions. The spaced-apart configuration provides local conduction through fingers while preserving global isolation functionality, achieving both low resistance and high breakdown voltage.
Data Source
AI summary
A semiconductor structure comprises a substrate having a first conductive type; a deep well having a second conductive type formed in the substrate and extending down from a surface of the substrate; a first well and a second well respectively having the first and second conductive types formed in the deep well, and extending down from the surface of the substrate; a gate electrode formed on the substrate and disposed between the first and second wells; an isolation extending down from the surface of the substrate and disposed between the gate electrode and the second well; a conductive plug including a first portion and a second portion electrically connected to each other, and the first portion electrically connected to the gate electrode, and the second portion comprising at least two fingers penetrating into the isolation, and the fingers spaced apart and electrically connected to each other.