Semiconductor Conductive Plug Reduces On-Resistance
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Solution Overview
Problem
Current semiconductor structures, such as LDMOS and EDMOS devices, face limitations in reducing on-resistance while maintaining or increasing breakdown voltage, with only about 5% improvement in the Ron/BVD ratio achieved through well schemes or implant optimization.
Innovation Solution
A semiconductor structure comprising a substrate with deep wells and conductive plugs, where the conductive plug includes a first portion connected to the gate electrode and a second portion penetrating into isolation, effectively reducing on-resistance and enhancing breakdown voltage without requiring additional masks or photolithography steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional masks or photolithography steps are added to reduce on-resistance, then manufacturing complexity increases
Solution Approach 1:
The conductive plug formation is merged with the existing isolation layer structure. The plug utilizes the already-formed isolation layer as its matrix, combining two functions (isolation and conduction path) into a single integrated structure. This eliminates the need for separate masking and photolithography steps that would be required for conventional resistance reduction techniques.
Solution Approach 2:
The isolation layer serves dual purposes: it provides electrical isolation where needed and simultaneously serves as the medium for the conductive plug to create low-resistance paths. The structure is self-sufficient, using its own material layer to achieve resistance reduction without requiring external additional processing layers or steps.
Data Source
AI summary
A semiconductor structure comprises a substrate having a first conductive type; a deep well having a second conductive type formed in the substrate and extending down from a surface of the substrate; a first well having the first conductive type and a second well having the second conductive type both formed in the deep well and extending down from the surface of the substrate, and the second well spaced apart from the first well; a gate electrode formed on the substrate and disposed between the first and second wells; an isolation extending down from the surface of the substrate and disposed between the gate electrode and the second well; a conductive plug including a first portion and a second portion electrically connected to each other, and the first portion electrically connected to the gate electrode, and the second portion penetrating into the isolation.