Semiconductor Device Conductive Post Inductance Reduction
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing line inductance, which limits high-speed switching capabilities and increases the size of the device, and the current bypass effect is insufficient for high-performance switching elements like SiC semiconductor elements.
Innovation Solution
A semiconductor device design featuring an insulating substrate, a semiconductor chip with gate and source electrodes, a printed circuit board with metal layers, and conductive posts that connect the gate and source electrodes through a circuit impedance reducing element, such as a capacitor, to reduce line inductance and enhance current bypass.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bonding wire is used to connect semiconductor chip to circuit plate, then ease of manufacture is improved, but line inductance increases and switching speed decreases
Solution Approach 1:
The patent extracts the bonding wire from the gate connection path and replaces it with conductive posts that provide a direct mechanical and electrical connection between the gate electrode and the circuit plate, eliminating the inductive effect of the bonding wire while maintaining ease of manufacture through standardized post structures
Solution Approach 2:
The patent introduces conductive posts as an intermediary element between the gate electrode and the circuit plate, providing a low-inductance connection path that mediates the electrical connection while enabling high-speed switching performance
2Ease of manufacture
If bonding wire and circuit plate with wiring pattern are provided, then ease of manufacture is improved, but device size increases
Solution Approach 1:
The patent transitions from a planar wiring pattern on the circuit plate to a three-dimensional conductive post structure that extends vertically, reducing the horizontal space required for connections and thereby reducing overall device size while maintaining ease of manufacture through standardized post components
3Device complexity
If conventional line structure is used, then device complexity is reduced, but current bypass effect is insufficient for high-performance switching elements
Solution Approach 1:
The patent changes the physical parameters of the connection structure by using conductive posts with optimized dimensions and materials, altering the electrical characteristics to achieve low inductance and enhance the current bypass effect, thereby improving reliability for high-performance switching elements without significantly increasing device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces internal line inductance, prevents unintentional switching of the semiconductor chip, and expands the operational range of switching elements by minimizing gate voltage oscillations.
Implementation Method 1
a circuit impedance reducing element, such as a capacitor, to reduce line inductance and enhance current bypass
Data Source
AI summary
A semiconductor device includes an insulating substrate having an insulating plate and a circuit plate; a semiconductor chip having a front surface provided with a gate electrode and a source electrode, and a rear surface fixed to the circuit plate; a printed circuit board facing the insulating substrate, and including a first metal layer and a second metal layer; a first conductive post having two ends electrically and mechanically connected to the gate electrode and the first metal layer; a second conductive post having two ends electrically and mechanically connected to the source electrode and the second metal layer; and a circuit impedance reducing element electrically connected between the gate electrode and the source electrode through the first conductive post and the second conductive post.