Semiconductor Device Conductor Layer Configuration for Thermal Management
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Solution Overview
Problem
Semiconductor devices face challenges in achieving high heat radiation capability and preventing warpage due to thermal stress, as existing technologies fail to effectively manage the thermal expansion differences between materials in circuit substrates, leading to insufficient heat radiation and structural deformation.
Innovation Solution
The semiconductor device design includes a configuration with a first conductor layer on one surface of the insulating plate and a second and third conductor layer on the opposite surface, where the third layer has a thicker mounting region than the second, and the sum of the second and third volumes is between 70% and 130% of the first volume, along with a sealing part made of a material with a higher linear expansion coefficient to reduce thermal stress and prevent warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal layer and heat spreader are bonded by soldering, then electrical connection is achieved, but heat radiation capability deteriorates due to insufficient heat conduction through the solder layer
Solution Approach 1:
The patent introduces a copper plate as an intermediary component between the lower surface of the insulating plate and the heat sink. This copper plate serves dual functions: providing electrical connection (replacing soldering) and enhancing heat conduction to the heat sink, thereby resolving the contradiction between electrical connection reliability and heat radiation capability
Solution Approach 2:
The patent employs a composite structure combining the insulating plate (ceramic or resin), copper plate (conductive material), and heat sink (aluminum or copper). This composite design integrates materials with different properties to simultaneously achieve electrical connection, thermal management, and mechanical support functions
2Adaptability or versatility
If different materials are used for circuit pattern and insulating plate, then functional requirements are met, but warpage occurs due to difference in thermal expansion coefficients
Solution Approach 1:
The patent modifies the thermal expansion parameters by introducing a copper plate with thermal expansion coefficient between 16-18 ppm/K, which is intermediate between the insulating plate (2-7 ppm/K) and the heat sink (20-23 ppm/K). This parameter matching reduces thermal stress and prevents warpage during temperature cycling
Solution Approach 2:
The patent explicitly addresses thermal expansion differences by selecting materials with compatible expansion coefficients. The copper plate's thermal expansion properties are specifically chosen to bridge the gap between the ceramic/resin insulating plate and the aluminum/copper heat sink, preventing structural deformation
3Productivity
If semiconductor chips are integrated at higher speeds with higher power density, then processing performance is improved, but heat generation increases requiring higher heat radiation capability
Solution Approach 1:
The copper plate acts as a thermal intermediary that efficiently conducts heat away from the high-power-density semiconductor chips. The plate's high thermal conductivity and large surface area enable effective heat dissipation, supporting higher processing performance without excessive heat generation
Solution Approach 2:
The patent extracts the heat management function from the semiconductor chip assembly by introducing a separate, dedicated heat dissipation structure (copper plate + heat sink). This separation allows the semiconductor chips to focus on high-performance processing while the external thermal management system handles heat removal
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances heat radiation capability and reduces transient thermal resistance, effectively preventing warpage and extending the lifespan of the semiconductor device by minimizing thermal stress and ensuring reliable electrical connections.
Implementation Method 1
The first conductor layer is provided on a first surface of the insulating plate... The second conductor layer is provided on a second surface of the insulating plate... The third conductor layer is provided on the second surface of the insulating plate away from the second conductor layer
Implementation Method 2
If temperature of a semiconductor device changes, warpage occurs in the circuit substrate due to a difference of thermal expansion coefficient between the different materials
Data Source
AI summary
A first conductor layer is provided on a first surface of an insulating plate, and has a first volume. A second conductor layer is provided on a second surface of the insulating plate, and has a second volume. A third conductor layer is provided on a second surface of the insulating plate, and has a second volume. The third conductor layer has a mounting region thicker than the second conductor layer. The sum of the second and third volumes is greater than or equal to 70% and smaller than or equal to 130% of the first volume. A semiconductor chip is provided on the mounting region. A sealing part is formed of an insulator, and seals the semiconductor chip within a case.