Semiconductor Device Connection Checking via Bottom Surface Land
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Solution Overview
Problem
Existing connection checking methods for semiconductor devices in POP structures risk damaging the package substrate and are inefficient due to the need for precise positioning of measurement pins, which can lead to repeated contact and potential damage during multiple measurements.
Innovation Solution
A semiconductor device configuration that includes a first land on the top surface and a second land on the underside, connected through a branch line and a second terminal, allowing connection checks without damaging the substrate by eliminating the need for precise positioning of measurement pins on the top surface, using a second solder ball connected to the branch line for resistance measurement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If measurement pins are positioned on the top surface land for connection checking, then the connection between land and solder balls can be verified, but the package substrate is at risk of damage due to repeated contact and positioning errors
Solution Approach 1:
The patent introduces a second land and second solder balls as intermediary elements for connection checking. Instead of directly contacting the first land on the top surface, the measurement pins contact the second land on the bottom surface, which is electrically connected to the first land through internal interconnections. This intermediary path allows verification of the first land-solder ball connection without exposing the top surface land to mechanical damage risks.
Solution Approach 2:
The patent inverts the conventional connection checking approach by performing measurements from the bottom surface rather than the top surface. The second land and second solder balls are positioned on the bottom surface of the package substrate, allowing measurement pins to contact these elements from below. This inversion eliminates the need for precise positioning on the top surface and prevents damage to the first land while still enabling verification of the same electrical connection path.
2Measurement precision
If precise positioning of measurement pins is required for connection checking, then accurate measurement can be achieved, but the complexity and cost of checking equipment increases
Solution Approach 1:
The second land and second solder balls serve as intermediary measurement points that are more accessible and tolerant to positioning variations. These intermediaries are positioned on the bottom surface where measurement pins can contact them without requiring the same level of precision as top surface contacts, thereby reducing equipment complexity while maintaining measurement accuracy through the electrical connection path.
3Productivity
If multiple connection checks are performed on the same land, then thorough verification can be achieved, but the land may be damaged due to repeated contact
Solution Approach 1:
The patent uses the second land and second solder balls as expendable intermediaries that can be contacted repeatedly during multiple connection checks. These intermediaries on the bottom surface absorb the mechanical wear from repeated measurement pin contact, while the critical first land on the top surface remains protected and can be reused for actual device operation without degradation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables reliable and efficient connection checks between the second land and solder balls without damaging the substrate, enhancing yield and productivity while reducing equipment costs by eliminating the need for an upper socket with measurement pins.
Implementation Method 1
a value of the resistance between the first land 210 and each solder ball 213 is thus measured
Data Source
AI summary
A package-on-package (POP), including a semiconductor device, and a multi-chip-package located above the semiconductor device, wherein the semiconductor device includes a substrate including a first surface, a plurality of electrodes formed on the first surface, a second surface opposite to the first surface, a plurality of lands formed on the second surface, and a plurality of wirings, (a2) a semiconductor chip mounted over the first surface of the substrate, and (a3) a plurality of first solder balls formed on the lands, respectively, wherein the multi-chip-package is electrically connected with the semiconductor device via a plurality of second solder balls, wherein the plurality of second solder balls are connected with the plurality of electrodes, respectively.