Semiconductor Contact Structure With Air Gap Sidewall Isolation

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Solution Overview

Problem

The complexity of manufacturing semiconductor devices increases with the scaling down process, requiring advancements in IC manufacturing to maintain efficiency and reduce costs.

Innovation Solution

A method involving the formation of semiconductor devices with a sacrificial material layer, followed by etching and doping processes to create air gaps and expand dielectric layers, enhancing the integration of contacts and reducing the overall device complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If geometry size is decreased to increase functional density, then production efficiency is improved and costs are lowered, but manufacturing complexity increases

Engineering Contradiction:
Improveproduction efficiencyVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the manufacturing process into distinct stages: forming mandrels with first dimensions, depositing spacer material, and selectively removing portions to create features with second dimensions. This multi-stage approach enables precise control of geometric features at scaled dimensions while managing process complexity through structured sequencing of operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs preliminary action through the formation of sacrificial mandrel structures and spacer materials before final feature definition. The mandrels are formed with controlled dimensions, spacer material is deposited conformally, and then selective removal occurs to create the desired air gaps and feature patterns. This preparatory structuring enables subsequent processing steps to achieve high precision at reduced geometries.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If geometry size is decreased to increase functional density, then production efficiency is improved and costs are lowered, but manufacturing precision requirements increase

Engineering Contradiction:
Improveproduction efficiencyVSAvoidgeometric precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent uses intermediary structures (sacrificial mandrels and spacer materials) as mediators to achieve precise geometric features. The mandrels serve as temporary placeholders with controlled dimensions, and the conformally deposited spacer material acts as an intermediary layer that defines final feature dimensions through its thickness rather than direct patterning. This intermediary approach enables superior dimensional control at scaled geometries.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies parameter changes by controlling the dimensions of mandrels and spacer thickness to define final feature geometries. The first dimension of mandrels and the thickness of spacer material are precisely controlled parameters that determine the second dimension of final features. This parameter-based control enables high manufacturing precision through deposition thickness control rather than lithographic resolution.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the integration of contacts and reduces device complexity, thereby enhancing manufacturing efficiency and lowering costs.

Implementation Method 1

performing a doping process on the second dielectric layer, thereby causing an expansion of the second dielectric layer

Methodology Applied
Scientific EffectDoping: Dopants

Data Source

PatentUS20250309103A1Methods of forming semiconductor device
Publication Date: 2025.10.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250309103A1 patent drawing
  • US20250309103A1 patent drawing
  • US20250309103A1 patent drawing

AI summary

A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.