Semiconductor Process Redressing Contact Etch Stop Layer Profile

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Solution Overview

Problem

As semiconductor component layouts integrate and spacings shrink, structural defects and processing difficulties arise due to challenges in filling interdielectric layers and the complexity of removing spacers or cap layers, which can damage or pollute other parts of the semiconductor components, degrading electrical performance.

Innovation Solution

A semiconductor process that forms a stacked structure with a contact etch stop layer, where the top part is redressed through a single etching process to change the cross-sectional profile, simplifying photolithography and allowing easier filling of interdielectric layers without damaging other components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If multiple processing steps are added to remove spacers or cap layers, then the filling of interdielectric layer is improved, but the complexity of the process increases and other parts of semiconductor components may be damaged or polluted

Engineering Contradiction:
Improvefilling of interdielectric layerVSAvoidprocessing steps
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The contact etch stop layer is formed with a pre-designed topography that anticipates the needs of subsequent interdielectric layer filling. By creating protruding parts on the contact etch stop layer before forming the interdielectric layer, the patent eliminates the need for later removal of spacers or cap layers, thus simplifying the overall process while ensuring proper filling.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If multiple processing steps are added to remove spacers or cap layers, then the filling of interdielectric layer is improved, but the risk of damaging or polluting other parts increases

Engineering Contradiction:
Improvefilling of interdielectric layerVSAvoidintegrity of semiconductor components
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The contact etch stop layer serves as an intermediary structure that facilitates the filling of the interdielectric layer without requiring the removal of other protective layers. By using the contact etch stop layer's protruding parts as the key feature for filling control, the patent avoids the need to remove spacers or cap layers, thereby preventing damage or pollution to other semiconductor components.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If photolithography processes are simplified by redressing contact etch stop layer, then the processing time is reduced, but the manufacturing precision requirement increases

Engineering Contradiction:
Improveprocessing timeVSAvoidetching process precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent modifies the physical parameters of the contact etch stop layer by creating protruding parts with specific dimensions and positions. This parameter change allows the etching process to be performed once to achieve the desired profile, reducing processing time while the precise control of protruding part dimensions ensures that manufacturing precision requirements are met.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This process reduces processing time, avoids structural defects, and prevents damage to electrode layers, ensuring complete filling of interdielectric layers and maintaining the integrity of semiconductor components.

Implementation Method 1

the top part is redressed

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS9240459B2Semiconductor process
Publication Date: 2016.01.19 UNITED MICROELECTRONICS CORP
  • US9240459B2 patent drawing
  • US9240459B2 patent drawing
  • US9240459B2 patent drawing

AI summary

A semiconductor process includes the following step. A stacked structure is formed on a substrate. A contact etch stop layer is formed to cover the stacked structure and the substrate. A material layer is formed on the substrate and exposes a top part of the contact etch stop layer covering the stacked structure. The top part is redressed.