Semiconductor Device Contact Height Asymmetry for Short Channel Effect Suppression

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Solution Overview

Problem

Existing semiconductor devices face challenges in suppressing the short channel effect (SCE) due to the formation of parasitic transistors, which affects the performance and reliability of the devices.

Innovation Solution

A semiconductor device design that includes a semiconductor pattern on a substrate with a blocking pattern and a gate electrode, where the contact height from the substrate is different from the gate electrode height, and a wire pattern with specific configurations to prevent parasitic transistor formation, thereby suppressing the short channel effect.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional semiconductor device structures are used, then manufacturing is simpler, but parasitic transistors form causing short channel effect

Engineering Contradiction:
Improveshort channel effect suppressionVSAvoidcontact and gate electrode structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The contact structure is segmented into multiple portions with different heights relative to the gate electrode. Specifically, the contact includes a first portion extending to a first height and a second portion extending to a second height different from the first height, allowing different regions of the contact to serve different functional purposes in preventing parasitic transistor formation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces vertical dimensionality variation by creating contacts at different heights relative to the gate electrode. This multi-level contact structure adds a vertical dimension to the conventional planar contact design, enabling better control over electric field distribution and prevention of parasitic transistor formation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If contact height equals gate electrode height, then structure is simpler, but parasitic transistors form

Engineering Contradiction:
Improveparasitic transistor preventionVSAvoidcontact configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The contact structure employs asymmetric height configuration where different portions of the contact extend to different heights relative to the gate electrode. This asymmetric design breaks the symmetry that would otherwise allow parasitic transistor formation, with the first portion at a first height and the second portion at a second height

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

Different portions of the contact structure are given different local properties through their varying heights. The first portion of the contact has a different height property than the second portion, allowing each region to optimally perform its local function in preventing parasitic transistor formation while maintaining overall device performance

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10128346B2Semiconductor device
Publication Date: 2018.11.13 SAMSUNG ELECTRONICS CO LTD
  • US10128346B2 patent drawing
  • US10128346B2 patent drawing
  • US10128346B2 patent drawing

AI summary

A semiconductor device includes a semiconductor pattern on a substrate along a first direction, a blocking pattern on a top surface of the semiconductor pattern, a first wire pattern on the blocking pattern along a second direction different from the first direction, the first wire including a first part and a second part on opposite sides of the first part, a gate electrode surrounding the first part of the first wire pattern, and a contact surrounding the second part of the first wire pattern, wherein a height of a bottom surface of the contact from a top surface of the substrate is different from a height of a bottom surface of the gate electrode from the top surface of the substrate.