Semiconductor Contact Hole Fabrication via Dummy Mask Etching
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Solution Overview
Problem
Current semiconductor fabrication techniques face challenges in achieving high horizontal integration density due to resolution limitations in photolithography, particularly in forming contact holes and recess features for DRAM devices using double patterning methods, which can result in uniformity imbalances and critical dimension variations.
Innovation Solution
The method involves forming a mask stack with a mid layer and sequential deposition of buffer layers and dummy mask layers, followed by anisotropic etching to create grid-type patterns and transfer target patterns to the device layer, ensuring uniformity and precision in contact hole formation by concurrently etching buffer layers and dummy mask layers through linear patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If photolithography is used for patterning, then manufacturing process is simple, but resolution limitation prevents high horizontal integration density
Solution Approach 1:
The patterning process is segmented into multiple steps (double patterning technique) where a first pattern is formed, then a second pattern is formed separately. This allows each patterning step to work within achievable resolution limits while the combination achieves higher effective density that would be impossible in a single step.
Solution Approach 2:
A mid layer is formed preliminarily over the mask stack before the final patterning steps. This preliminary structure provides a foundation that enables subsequent pattern formation with improved uniformity and precision, addressing resolution limitations by preparing the substrate in advance.
2Productivity
If double patterning technique is applied, then horizontal integration density is improved, but uniformity imbalance and critical dimension variation occur
Solution Approach 1:
Different layers (mask stack, mid layer, buffer layers, dummy mask layers) are assigned different local qualities and functions. The mid layer provides a specific thickness and material composition optimized for uniformity, while buffer layers provide structural support. This local differentiation ensures each layer contributes optimally to overall pattern uniformity.
Solution Approach 2:
The method controls and adjusts critical parameters including the thickness of the mid layer, the composition of buffer layers, and the deposition conditions of dummy mask layers. By optimizing these parameters, the process achieves improved uniformity and reduced critical dimension variation despite using double patterning.
3Manufacturing precision
If mask layers are deposited to achieve pattern precision, then manufacturing precision is improved, but process complexity increases
Solution Approach 1:
The mid layer acts as an intermediary between the mask stack and the underlying structure. It mediates the pattern transfer process by providing a controlled interface that improves precision without requiring direct modification of the mask stack deposition process. Buffer layers serve as additional intermediaries that simplify the overall process by providing stable structural foundations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the uniformity and precision of contact hole formation, improving the quality and consistency of semiconductor device fabrication by maintaining uniform thickness of mask layers and reducing asymmetry in pattern profiles, thus overcoming resolution limitations and achieving higher integration density.
Implementation Method 1
followed by anisotropic etching to create grid-type patterns and transfer target patterns to the device layer
Implementation Method 2
performing an ashing process to reduce the target pattern structure such that the recessed first dummy layer is exposed
Implementation Method 3
sequential deposition of buffer layers and dummy mask layers
Data Source
AI summary
A method comprises: disposing an ashing resistive layer over a multi-layered mask; sequentially disposing a first and second dummy layer on the ashing resistive layer; sequentially forming a first pattern structure and a second pattern structure there-over over the second dummy layer; recessing the second dummy layer, through the first and the second pattern structure, to partially expose the first dummy layer and to form a target pattern structure defining a target pattern; performing an anisotropic etching process, through the target pattern structure, to recess the exposed portions of the first dummy layer such that the target pattern is transferred to the recessed first dummy layer; performing an ashing process to remove the target pattern structure; and performing a pattern transferring process by recessing the ashing resistive layer and the multi-layered mask through the recessed first dummy layer to transfer the target pattern to the multi-layered mask.