Semiconductor Contact Interface Layer for Uniform Plug Metallization
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Solution Overview
Problem
The formation of high-quality metal plugs and interconnection layers in semiconductor devices is challenging, leading to poor electrical performance due to uneven growth rates and damage to the source-drain plug layer during subsequent processes.
Innovation Solution
A semiconductor device structure and fabrication method that includes forming an interface layer on the top surfaces of the source-drain plug layer and the gate structure, followed by the deposition of an interconnection layer. The interface layer is formed by reacting a barrier layer with a reaction layer, resulting in a layer with lower resistance than the barrier layer, which helps in reducing contact and sheet resistances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an interconnection layer is deposited directly on the source-drain plug layer and gate structure, then the manufacturing process is simple, but the growth rate is uneven causing holes and poor formation quality
Solution Approach 1:
An interface layer is introduced as an intermediary between the source-drain plug layer/gate structure and the interconnection layer. This interface layer acts as a mediator that enables uniform deposition of the interconnection layer by providing a consistent surface, thereby preventing hole formation while maintaining process simplicity.
Solution Approach 2:
The interface layer is formed in advance before depositing the interconnection layer. This preliminary action prepares the surface by creating a uniform interface that ensures consistent growth rates during subsequent interconnection layer deposition, preventing defects like holes.
2Ease of operation
If the source-drain plug layer is exposed during subsequent processes, then direct access is achieved, but the source-drain plug layer is damaged affecting device performance
Solution Approach 1:
The interface layer is formed in advance to cover and protect the source-drain plug layer top surface before subsequent processing steps. This preliminary protective action prevents damage to the source-drain plug layer while still allowing necessary access through the through-holes.
Solution Approach 2:
The interface layer serves as a protective cushion layer that shields the source-drain plug layer from damage during subsequent processes. This beforehand cushioning ensures the integrity and reliability of the source-drain plug layer while maintaining processability.
3Reliability
If a barrier layer is used alone, then diffusion protection is provided, but the contact resistance and sheet resistance are high
Solution Approach 1:
The interface layer is formed as a composite structure involving the barrier layer reacting with a reaction layer. This composite material approach combines the diffusion protection properties of the barrier layer with the low resistance properties of the reaction layer, achieving both protection and low contact resistance.
Solution Approach 2:
The interface layer formation process involves changing the material parameters through chemical reaction between the barrier layer and reaction layer. This parameter change transforms the high-resistance barrier layer into a low-resistance interface layer while maintaining diffusion protection capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method ensures consistent growth rates of interconnection layers over both the source-drain plug layer and the gate structure, preventing defects like holes and improving the quality of the interconnection layer. Additionally, the interface layer seals the source-drain plug layer, protecting it from damage and enhancing the overall performance and yield of the semiconductor device.
Implementation Method 1
forming an interface layer on the exposed top surface of each of the source-drain plug layer and the gate structure. forming a barrier layer on the exposed top surface of each of the source-drain plug layer and the gate structure, and forming a reaction layer on the barrier layer. The reaction layer reacts with the barrier layer to form the interface layer
Implementation Method 2
the interface layer seals the source-drain plug layer, protecting it from damage
Implementation Method 3
forming an interconnection layer on the top surface of the interface layer and fully filling each of the first through-hole and the second through-hole
Data Source
AI summary
A semiconductor device and a fabrication method of the semiconductor device are provided. The semiconductor device includes a substrate, a source-drain plug layer in the substrate, a gate structure in the substrate, and a dielectric layer disposed over the substrate and covering the gate structure and the source-drain plug layer. The dielectric layer contains a first through-hole having a bottom exposing a top surface of the source-drain plug layer, and a second through-hole having a bottom exposing a top surface of the gate structure. Further, the semiconductor device includes an interface layer disposed on each of the top surface of the source-drain plug layer exposed by the first through-hole and the top surface of the gate structure exposed by the second through-hole.