Semiconductor Memory Contact Layout for Reliable Capacitor Connections
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Solution Overview
Problem
The challenge of securing reliability in semiconductor memory devices becomes difficult due to the high degree of integration and reduced design rules, which complicates the electrical connections between different vertical levels.
Innovation Solution
The semiconductor memory device incorporates wiring contact plugs that are strategically positioned to maintain a separation distance from the edge of a support pattern, ensuring reliable electrical connections through a structured layout that includes various types of contact plugs with varying horizontal separation distances and vertical heights.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the degree of integration is increased and design rules are reduced to make devices more compact, then device compactness and integration density are improved, but reliability of electrical connections becomes difficult to secure
Solution Approach 1:
The patent applies local quality by differentiating the horizontal separation distances for different contact plugs. First wiring contact plugs maintain a first horizontal separation distance greater than the side surface thickness, while second wiring contact plugs maintain a second horizontal separation distance less than the side surface thickness. This localized differentiation allows the device to achieve high integration density while maintaining reliable electrical connections where needed.
Solution Approach 2:
The patent resolves the contradiction by transitioning from a single-dimensional separation approach to a multi-dimensional approach. It introduces both horizontal separation distances (first and second horizontal separation distances at different vertical levels) and vertical height variations (first vertical height greater than side surface thickness, second vertical height less than side surface thickness). This dimensional differentiation enables compact integration while preserving connection reliability.
2Area of stationary object
If wiring contact plugs are positioned closer to the edge of the support pattern, then device area is reduced and integration density is improved, but electrical connection reliability deteriorates
Solution Approach 1:
The patent segments the wiring contact plugs into two distinct groups with different positioning requirements. First wiring contact plugs are positioned at a first horizontal separation distance greater than the side surface thickness to ensure reliable electrical connections, while second wiring contact plugs are positioned at a second horizontal separation distance less than the side surface thickness to reduce device area. This segmentation allows simultaneous achievement of both reliability and compactness.
Solution Approach 2:
Different local positioning strategies are applied to different contact plugs based on their functional requirements. First wiring contact plugs use a conservative separation distance for reliability-critical connections, while second wiring contact plugs use an aggressive separation distance for area reduction. This local quality approach optimizes the overall device performance.
3Ease of manufacture
If a uniform horizontal separation distance is used for all wiring contact plugs, then manufacturing process is simplified, but device area cannot be optimized for high integration
Solution Approach 1:
The manufacturing process is segmented into distinct stages for forming first and second wiring contact plugs with different horizontal separation distances. First wiring contact plugs are formed with a first horizontal separation distance greater than the side surface thickness, while second wiring contact plugs are formed with a second horizontal separation distance less than the side surface thickness. This segmented approach enables area optimization while maintaining manageable manufacturing complexity through systematic process differentiation.
Data Source
AI summary
Provided is a semiconductor memory device including a substrate, a plurality of lower electrodes on the substrate, a support pattern in contact with upper end sidewalls of the plurality of lower electrodes, a capacitor dielectric layer on the plurality of lower electrodes, upper electrodes on the capacitor dielectric layer, a cover insulating layer covering the upper electrode, and a plurality of first wiring contact plugs configured to penetrate the cover insulating layer and extend into the upper electrode, wherein, in a plan view, the plurality of first wiring contact plugs are apart from an edge of the support pattern into the support pattern by at least a first horizontal separation distance, and wherein the first horizontal separation distance is greater than a side surface thickness that is a thickness of a portion of the upper electrode covering side surfaces of the support pattern.