Semiconductor Contact Insulating Liner for Reduced Resistance
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Solution Overview
Problem
As semiconductor devices shrink in size, achieving effective separation and low resistance between conductive layers becomes increasingly challenging, particularly in contact resistance, which existing technologies have not adequately addressed.
Innovation Solution
The implementation of an additional insulating liner layer in contact openings, with partial removal of its upper portion, enhances electrical isolation and allows for increased conductive material filling, thereby reducing contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If semiconductor device dimensions are decreased, then device scaling is achieved, but separation and insulation between conductive layers becomes insufficient and contact resistance increases
Solution Approach 1:
The patent divides the contact structure into multiple segments: a first conductive layer, an insulating layer, and a second conductive layer. This segmentation allows each layer to perform its specific function - the insulating layer provides electrical isolation while the conductive layers provide low-resistance pathways, resolving the contradiction between device scaling and maintaining reliable electrical isolation.
Solution Approach 2:
The patent introduces an insulating layer as an intermediary between conductive layers. This intermediary layer provides the necessary electrical isolation in scaled-down devices without increasing overall device dimensions, allowing the device to maintain both small size and reliable electrical isolation.
2Reliability
If insulating layer thickness is increased to improve electrical isolation, then separation between conductive layers is enhanced, but contact resistance increases due to larger separation distance
Solution Approach 1:
The patent applies local quality by making the insulating layer selectively present in certain regions. The insulating layer is positioned between conductive layers only where electrical isolation is needed, while allowing direct contact or reduced isolation where low resistance is required. This localized approach enables simultaneous optimization of both electrical isolation and contact resistance.
Solution Approach 2:
The patent transitions from a single-layer contact structure to a multi-layer vertical structure. By stacking conductive layers with an insulating layer in between, the solution moves to another dimension (vertical stacking) to achieve both electrical isolation and low contact resistance without increasing horizontal separation distances.
Data Source
AI summary
A semiconductor device includes a substrate provided with an electronic device, an interlayer dielectric (ILD) layer formed over the electronic device, a wiring pattern formed on the ILD layer and a contact formed in the ILD layer and physically and electrically connecting the wiring pattern to a conductive region of the electronic device. An insulating liner layer is provided on sidewalls of the contact between the contact and the ILD layer. A height of the insulating liner layer measured from a top of the conductive region of the electronic device is less than 90% of a height of the contact measured between the top of the conductive region and a level of an interface between the ILD layer and the wiring pattern.